diff options
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SOPInstructions.td | 2 | ||||
| -rw-r--r-- | llvm/test/MC/AMDGPU/sop2-err.s | 7 | ||||
| -rw-r--r-- | llvm/test/MC/AMDGPU/sop2.s | 8 |
3 files changed, 16 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td index 597d9ba668d..b4adbdd1df0 100644 --- a/llvm/lib/Target/AMDGPU/SOPInstructions.td +++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td @@ -434,7 +434,7 @@ def S_BFE_I64 : SOP2_64_32 <"s_bfe_i64">; def S_CBRANCH_G_FORK : SOP2_Pseudo < "s_cbranch_g_fork", (outs), - (ins SReg_64:$src0, SReg_64:$src1), + (ins SCSrc_b64:$src0, SCSrc_b64:$src1), "$src0, $src1" > { let has_sdst = 0; diff --git a/llvm/test/MC/AMDGPU/sop2-err.s b/llvm/test/MC/AMDGPU/sop2-err.s new file mode 100644 index 00000000000..5115489a7f2 --- /dev/null +++ b/llvm/test/MC/AMDGPU/sop2-err.s @@ -0,0 +1,7 @@ +// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN %s + +s_cbranch_g_fork 100, s[6:7] +// GCN: error: invalid operand for instruction + +s_cbranch_g_fork s[6:7], 100 +// GCN: error: invalid operand for instruction diff --git a/llvm/test/MC/AMDGPU/sop2.s b/llvm/test/MC/AMDGPU/sop2.s index 805710d9b97..6f1d083e302 100644 --- a/llvm/test/MC/AMDGPU/sop2.s +++ b/llvm/test/MC/AMDGPU/sop2.s @@ -160,6 +160,14 @@ s_cbranch_g_fork s[4:5], s[6:7] // SICI: s_cbranch_g_fork s[4:5], s[6:7] ; encoding: [0x04,0x06,0x80,0x95] // VI: s_cbranch_g_fork s[4:5], s[6:7] ; encoding: [0x04,0x06,0x80,0x94] +s_cbranch_g_fork 1, s[6:7] +// SICI: s_cbranch_g_fork 1, s[6:7] ; encoding: [0x81,0x06,0x80,0x95] +// VI: s_cbranch_g_fork 1, s[6:7] ; encoding: [0x81,0x06,0x80,0x94] + +s_cbranch_g_fork s[6:7], 2 +// SICI: s_cbranch_g_fork s[6:7], 2 ; encoding: [0x06,0x82,0x80,0x95] +// VI: s_cbranch_g_fork s[6:7], 2 ; encoding: [0x06,0x82,0x80,0x94] + s_absdiff_i32 s2, s4, s6 // SICI: s_absdiff_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x96] // VI: s_absdiff_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x95] |
