diff options
| -rw-r--r-- | llvm/test/MC/AArch64/directive-arch-negative.s | 24 | ||||
| -rw-r--r-- | llvm/test/MC/AArch64/directive-cpu-err.s | 35 | ||||
| -rw-r--r-- | llvm/test/MC/AArch64/directive-cpu.s | 45 |
3 files changed, 48 insertions, 56 deletions
diff --git a/llvm/test/MC/AArch64/directive-arch-negative.s b/llvm/test/MC/AArch64/directive-arch-negative.s index 2991d2499eb..29df7510b70 100644 --- a/llvm/test/MC/AArch64/directive-arch-negative.s +++ b/llvm/test/MC/AArch64/directive-arch-negative.s @@ -2,23 +2,23 @@ .arch axp64 # CHECK: error: unknown arch name -# CHECK: .arch axp64 -# CHECK: ^ +# CHECK-NEXT: .arch axp64 +# CHECK-NEXT: ^ .arch armv8 aese v0.8h, v1.8h # CHECK: error: invalid operand for instruction -# CHECK: aese v0.8h, v1.8h -# CHECK: ^ +# CHECK-NEXT: aese v0.8h, v1.8h +# CHECK-NEXT: ^ // We silently ignore invalid features. .arch armv8+foo aese v0.8h, v1.8h # CHECK: error: invalid operand for instruction -# CHECK: aese v0.8h, v1.8h -# CHECK: ^ +# CHECK-NEXT: aese v0.8h, v1.8h +# CHECK-NEXT: ^ .arch armv8+crypto @@ -27,14 +27,14 @@ aese v0.8h, v1.8h # CHECK: error: invalid operand for instruction -# CHECK: aese v0.8h, v1.8h -# CHECK: ^ +# CHECK-NEXT: aese v0.8h, v1.8h +# CHECK-NEXT: ^ .arch armv8.1-a+noras esb # CHECK: error: instruction requires: ras -# CHECK: esb +# CHECK-NEXT: esb // PR32873: without extra features, '.arch' is currently ignored. // Add an unrelated feature to accept the directive. @@ -42,16 +42,16 @@ casa w5, w7, [x19] # CHECK: error: instruction requires: lse -# CHECK: casa w5, w7, [x19] +# CHECK-NEXT: casa w5, w7, [x19] .arch armv8+crypto crc32b w0, w1, w2 # CHECK: error: instruction requires: crc -# CHECK: crc32b w0, w1, w2 +# CHECK-NEXT: crc32b w0, w1, w2 .arch armv8.1-a+nolse casa w5, w7, [x20] # CHECK: error: instruction requires: lse -# CHECK: casa w5, w7, [x20] +# CHECK-NEXT: casa w5, w7, [x20] diff --git a/llvm/test/MC/AArch64/directive-cpu-err.s b/llvm/test/MC/AArch64/directive-cpu-err.s index ea0d28e7181..134251e4360 100644 --- a/llvm/test/MC/AArch64/directive-cpu-err.s +++ b/llvm/test/MC/AArch64/directive-cpu-err.s @@ -7,3 +7,38 @@ .cpu generic+wibble+nowobble // CHECK: :[[@LINE-1]]:18: error: unsupported architectural extension // CHECK: :[[@LINE-2]]:25: error: unsupported architectural extension + + .cpu generic+nofp + fminnm d0, d0, d1 + // CHECK: error: instruction requires: fp-armv8 + // CHECK-NEXT: fminnm d0, d0, d1 + // CHECK-NEXT: ^ + + .cpu generic+nosimd + addp v0.4s, v0.4s, v0.4s + // CHECK: error: instruction requires: neon + // CHECK-NEXT: addp v0.4s, v0.4s, v0.4s + // CHECK-NEXT: ^ + + .cpu generic+nocrc + crc32cx w0, w1, x3 + // CHECK: error: instruction requires: crc + // CHECK-NEXT: crc32cx w0, w1, x3 + // CHECK-NEXT: ^ + + .cpu generic+nocrypto+crc + aesd v0.16b, v2.16b + // CHECK: error: instruction requires: crypto + // CHECK-NEXT: aesd v0.16b, v2.16b + // CHECK-NEXT: ^ + + .cpu generic+nolse + casa w5, w7, [x20] + // CHECK: error: instruction requires: lse + // CHECK-NEXT: casa w5, w7, [x20] + // CHECK-NEXT: ^ + + .cpu generic+v8.1-a + // CHECK: error: unsupported architectural extension + // CHECK-NEXT: .cpu generic+v8.1-a + // CHECK-NEXT: ^ diff --git a/llvm/test/MC/AArch64/directive-cpu.s b/llvm/test/MC/AArch64/directive-cpu.s index 2c3ba0c1122..52efe06e853 100644 --- a/llvm/test/MC/AArch64/directive-cpu.s +++ b/llvm/test/MC/AArch64/directive-cpu.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s +// RUN: llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s .cpu generic @@ -8,64 +8,21 @@ fminnm d0, d0, d1 - .cpu generic+nofp - - fminnm d0, d0, d1 - .cpu generic+simd addp v0.4s, v0.4s, v0.4s - .cpu generic+nosimd - - addp v0.4s, v0.4s, v0.4s - .cpu generic+crc crc32cx w0, w1, x3 - .cpu generic+nocrc - - crc32cx w0, w1, x3 - .cpu generic+crypto+nocrc aesd v0.16b, v2.16b - .cpu generic+nocrypto+crc - - aesd v0.16b, v2.16b - - .cpu generic+nolse - casa w5, w7, [x20] - .cpu generic+lse casa w5, w7, [x20] -// NOTE: the errors precede the actual output! The errors appear in order -// though, so validate by hoisting them to the top and preservering relative -// ordering - -// CHECK: error: instruction requires: fp-armv8 -// CHECK: fminnm d0, d0, d1 -// CHECK: ^ - -// CHECK: error: instruction requires: neon -// CHECK: addp v0.4s, v0.4s, v0.4s -// CHECK: ^ - -// CHECK: error: instruction requires: crc -// CHECK: crc32cx w0, w1, x3 -// CHECK: ^ - -// CHECK: error: instruction requires: crypto -// CHECK: aesd v0.16b, v2.16b -// CHECK: ^ - -// CHECK: error: instruction requires: lse -// CHECK: casa w5, w7, [x20] -// CHECK: ^ - // CHECK: fminnm d0, d0, d1 // CHECK: fminnm d0, d0, d1 // CHECK: addp v0.4s, v0.4s, v0.4s |
