diff options
-rw-r--r-- | llvm/test/Transforms/InstCombine/select_meta.ll | 39 | ||||
-rw-r--r-- | llvm/test/Transforms/InstCombine/xor.ll | 10 |
2 files changed, 39 insertions, 10 deletions
diff --git a/llvm/test/Transforms/InstCombine/select_meta.ll b/llvm/test/Transforms/InstCombine/select_meta.ll index 816504b296c..250a33b4064 100644 --- a/llvm/test/Transforms/InstCombine/select_meta.ll +++ b/llvm/test/Transforms/InstCombine/select_meta.ll @@ -298,6 +298,45 @@ define i32 @umax2(i32 %x) { ret i32 %sel } +; FIXME: The condition is inverted, and the select ops are swapped. The metadata should be swapped. + +define i32 @not_cond(i1 %c, i32 %tv, i32 %fv) { +; CHECK-LABEL: @not_cond( +; CHECK-NEXT: [[R:%.*]] = select i1 [[C:%.*]], i32 [[FV:%.*]], i32 [[TV:%.*]], !prof ![[$MD1]] +; CHECK-NEXT: ret i32 [[R]] +; + %notc = xor i1 %c, true + %r = select i1 %notc, i32 %tv, i32 %fv, !prof !1 + ret i32 %r +} + +; FIXME: The condition is inverted, and the select ops are swapped. The metadata should be swapped. + +define <2 x i32> @not_cond_vec(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) { +; CHECK-LABEL: @not_cond_vec( +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i32> [[FV:%.*]], <2 x i32> [[TV:%.*]], !prof ![[$MD1]] +; CHECK-NEXT: ret <2 x i32> [[R]] +; + %notc = xor <2 x i1> %c, <i1 true, i1 true> + %r = select <2 x i1> %notc, <2 x i32> %tv, <2 x i32> %fv, !prof !1 + ret <2 x i32> %r +} + +; FIXME: Should match vector 'not' with undef element. After that... +; FIXME: The condition is inverted, and the select ops are swapped. The metadata should be swapped. + +define <2 x i32> @not_cond_vec_undef(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv) { +; CHECK-LABEL: @not_cond_vec_undef( +; CHECK-NEXT: [[NOTC:%.*]] = xor <2 x i1> [[C:%.*]], <i1 undef, i1 true> +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[NOTC]], <2 x i32> [[TV:%.*]], <2 x i32> [[FV:%.*]], !prof ![[$MD1]] +; CHECK-NEXT: ret <2 x i32> [[R]] +; + %notc = xor <2 x i1> %c, <i1 undef, i1 true> + %r = select <2 x i1> %notc, <2 x i32> %tv, <2 x i32> %fv, !prof !1 + ret <2 x i32> %r +} + + !1 = !{!"branch_weights", i32 2, i32 10} !2 = !{!"branch_weights", i32 3, i32 10} diff --git a/llvm/test/Transforms/InstCombine/xor.ll b/llvm/test/Transforms/InstCombine/xor.ll index c149cef295b..b06abe2919b 100644 --- a/llvm/test/Transforms/InstCombine/xor.ll +++ b/llvm/test/Transforms/InstCombine/xor.ll @@ -190,16 +190,6 @@ define void @test20(i32 %A, i32 %B) { ret void } -define i32 @test21(i1 %C, i32 %A, i32 %B) { -; CHECK-LABEL: @test21( -; CHECK-NEXT: [[D:%.*]] = select i1 [[C:%.*]], i32 [[B:%.*]], i32 [[A:%.*]] -; CHECK-NEXT: ret i32 [[D]] -; - %C2 = xor i1 %C, true - %D = select i1 %C2, i32 %A, i32 %B - ret i32 %D -} - define i32 @test22(i1 %X) { ; CHECK-LABEL: @test22( ; CHECK-NEXT: [[Z:%.*]] = zext i1 [[X:%.*]] to i32 |