diff options
100 files changed, 107 insertions, 107 deletions
diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp index e62c94dfd0a..9eb43d2bec1 100644 --- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp +++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp @@ -194,7 +194,7 @@ bool LLVMTargetMachine::addPassesToEmitFile( return true; if (StopAfter) { - PM.add(createPrintMIRPass(errs())); + PM.add(createPrintMIRPass(Out)); return false; } diff --git a/llvm/test/CodeGen/AArch64/branch-folder-merge-mmos.ll b/llvm/test/CodeGen/AArch64/branch-folder-merge-mmos.ll index bca3696b9ba..e3af90ae483 100644 --- a/llvm/test/CodeGen/AArch64/branch-folder-merge-mmos.ll +++ b/llvm/test/CodeGen/AArch64/branch-folder-merge-mmos.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=aarch64 -mtriple=aarch64-none-linux-gnu -stop-after branch-folder -o /dev/null < %s 2>&1 | FileCheck %s +; RUN: llc -march=aarch64 -mtriple=aarch64-none-linux-gnu -stop-after branch-folder -o - < %s | FileCheck %s target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" ; Function Attrs: norecurse nounwind diff --git a/llvm/test/CodeGen/AArch64/stackmap-frame-setup.ll b/llvm/test/CodeGen/AArch64/stackmap-frame-setup.ll index 83d56c1da21..5646703fa40 100644 --- a/llvm/test/CodeGen/AArch64/stackmap-frame-setup.ll +++ b/llvm/test/CodeGen/AArch64/stackmap-frame-setup.ll @@ -1,5 +1,5 @@ -; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL -; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL +; RUN: llc -o - -verify-machineinstrs -mtriple=aarch64-apple-darwin -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL +; RUN: llc -o - -verify-machineinstrs -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL define void @caller_meta_leaf() { entry: diff --git a/llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir b/llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir index 8c761298cd2..f7f953c144d 100644 --- a/llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir +++ b/llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=amdgcn -run-pass detect-dead-lanes -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=amdgcn -run-pass detect-dead-lanes -o - %s | FileCheck %s --- | define void @test0() { ret void } define void @test1() { ret void } diff --git a/llvm/test/CodeGen/AMDGPU/indirect-addressing-undef.mir b/llvm/test/CodeGen/AMDGPU/indirect-addressing-undef.mir index 345cd681dc5..7cd35d41f30 100644 --- a/llvm/test/CodeGen/AMDGPU/indirect-addressing-undef.mir +++ b/llvm/test/CodeGen/AMDGPU/indirect-addressing-undef.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-lower-control-flow -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-lower-control-flow -o - %s | FileCheck %s # Getting an undef that is specifically a VGPR is tricky from IR # CHECK-LABEL: name: extract_undef_offset_vgpr{{$}} diff --git a/llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir b/llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir index e3858cc59a4..2dd21ca51e4 100644 --- a/llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir +++ b/llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=amdgcn -run-pass rename-independent-subregs -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=amdgcn -run-pass rename-independent-subregs -o - %s | FileCheck %s --- | define void @test0() { ret void } ... diff --git a/llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll b/llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll index 45051d97608..98d1bb7cf9a 100644 --- a/llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll +++ b/llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll @@ -1,4 +1,4 @@ -; RUN: llc -o /dev/null %s -march=amdgcn -mcpu=verde -verify-machineinstrs -stop-after expand-isel-pseudos 2>&1 | FileCheck %s +; RUN: llc -o - %s -march=amdgcn -mcpu=verde -verify-machineinstrs -stop-after expand-isel-pseudos | FileCheck %s ; This test verifies that the instruction selection will add the implicit ; register operands in the correct order when modifying the opcode of an ; instruction to V_ADD_I32_e32. diff --git a/llvm/test/CodeGen/ARM/thumb1-ldst-opt.ll b/llvm/test/CodeGen/ARM/thumb1-ldst-opt.ll index bb55d2ac9b1..f3c83f04588 100644 --- a/llvm/test/CodeGen/ARM/thumb1-ldst-opt.ll +++ b/llvm/test/CodeGen/ARM/thumb1-ldst-opt.ll @@ -1,4 +1,4 @@ -; RUN: llc -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s +; RUN: llc -stop-after block-placement -o - %s | FileCheck %s target triple = "thumbv6m-none-none" diff --git a/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir b/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir index 38bf615ad25..64f5062e78b 100644 --- a/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir +++ b/llvm/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the .cfi_def_cfa operands # correctly. diff --git a/llvm/test/CodeGen/MIR/AArch64/machine-dead-copy.mir b/llvm/test/CodeGen/MIR/AArch64/machine-dead-copy.mir index 117b6940ac0..90f2f3c0999 100644 --- a/llvm/test/CodeGen/MIR/AArch64/machine-dead-copy.mir +++ b/llvm/test/CodeGen/MIR/AArch64/machine-dead-copy.mir @@ -1,5 +1,5 @@ -# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-cp -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s --- | define i32 @copyprop1(i32 %a, i32 %b) { ret i32 %a } diff --git a/llvm/test/CodeGen/MIR/AArch64/machine-scheduler.mir b/llvm/test/CodeGen/MIR/AArch64/machine-scheduler.mir index a6de39a1dae..9ea5c6811b6 100644 --- a/llvm/test/CodeGen/MIR/AArch64/machine-scheduler.mir +++ b/llvm/test/CodeGen/MIR/AArch64/machine-scheduler.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-scheduler -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-scheduler -verify-machineinstrs -o - %s | FileCheck %s --- | define i64 @load_imp-def(i64* nocapture %P, i32 %v) { diff --git a/llvm/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir b/llvm/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir index a67595b16fa..9a572e2fe18 100644 --- a/llvm/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir +++ b/llvm/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser can parse multiple register machine # operands before '='. diff --git a/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir b/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir index 97aec6db828..8c82c9bb504 100644 --- a/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir +++ b/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s --- | @var = global i64 0 diff --git a/llvm/test/CodeGen/MIR/AArch64/target-flags.mir b/llvm/test/CodeGen/MIR/AArch64/target-flags.mir index b5b001ef803..35c8eebbca2 100644 --- a/llvm/test/CodeGen/MIR/AArch64/target-flags.mir +++ b/llvm/test/CodeGen/MIR/AArch64/target-flags.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s --- | diff --git a/llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir b/llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir index d06040c638b..c1e297d934a 100644 --- a/llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir +++ b/llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o - %s | FileCheck %s # This test verifies that the MIR parser can parse target index operands. --- | diff --git a/llvm/test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir b/llvm/test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir index a5da48d0e81..a36a4dba14c 100644 --- a/llvm/test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir +++ b/llvm/test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple thumbv7 -verify-machineinstrs -start-after machine-cp -stop-after if-converter %s -o /dev/null 2>&1 | FileCheck %s +# RUN: llc -mtriple thumbv7 -verify-machineinstrs -start-after machine-cp -stop-after if-converter %s -o - | FileCheck %s --- | ; ModuleID = '/Volumes/Data/llvm/test/CodeGen/ARM/sched-it-debug-nodes.ll' target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" diff --git a/llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir b/llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir index d8086ae2cef..9d71bb9f61a 100644 --- a/llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir +++ b/llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o - %s | FileCheck %s # This test ensures that the MIR parser parses the bundled machine instructions # and 'internal' register flags correctly. diff --git a/llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir b/llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir index df2a817a850..6d42ccee2fa 100644 --- a/llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir +++ b/llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=arm-linux-unknown-gnueabi -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -mtriple=arm-linux-unknown-gnueabi -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s --- | declare void @dummy_use(i32*, i32) diff --git a/llvm/test/CodeGen/MIR/ARM/imm-peephole-arm.mir b/llvm/test/CodeGen/MIR/ARM/imm-peephole-arm.mir index 2fedd208777..cd30bdb74d5 100644 --- a/llvm/test/CodeGen/MIR/ARM/imm-peephole-arm.mir +++ b/llvm/test/CodeGen/MIR/ARM/imm-peephole-arm.mir @@ -1,4 +1,4 @@ -# RUN: llc -run-pass=peephole-opt %s -o /dev/null 2>&1 | FileCheck %s +# RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s # CHECK: [[IN:%.*]] = COPY %r0 # CHECK: [[SUM1TMP:%.*]] = ADDri [[IN]], 133 diff --git a/llvm/test/CodeGen/MIR/ARM/imm-peephole-thumb.mir b/llvm/test/CodeGen/MIR/ARM/imm-peephole-thumb.mir index 330d4812b56..3d342902d80 100644 --- a/llvm/test/CodeGen/MIR/ARM/imm-peephole-thumb.mir +++ b/llvm/test/CodeGen/MIR/ARM/imm-peephole-thumb.mir @@ -1,4 +1,4 @@ -# RUN: llc -run-pass=peephole-opt %s -o /dev/null 2>&1 | FileCheck %s +# RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s # CHECK: [[IN:%.*]] = COPY %r0 # CHECK: [[SUM1TMP:%.*]] = t2ADDri [[IN]], 25600 diff --git a/llvm/test/CodeGen/MIR/Generic/basic-blocks.mir b/llvm/test/CodeGen/MIR/Generic/basic-blocks.mir index fed2af79392..b6fdc6cb0c1 100644 --- a/llvm/test/CodeGen/MIR/Generic/basic-blocks.mir +++ b/llvm/test/CodeGen/MIR/Generic/basic-blocks.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses machine functions correctly. --- | diff --git a/llvm/test/CodeGen/MIR/Generic/frame-info.mir b/llvm/test/CodeGen/MIR/Generic/frame-info.mir index d6424fb977c..93580091eb5 100644 --- a/llvm/test/CodeGen/MIR/Generic/frame-info.mir +++ b/llvm/test/CodeGen/MIR/Generic/frame-info.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s # This test ensures that the MIR parser parses machine frame info properties # correctly. diff --git a/llvm/test/CodeGen/MIR/Generic/llvmIR.mir b/llvm/test/CodeGen/MIR/Generic/llvmIR.mir index 293da9f41ac..8b594df56d3 100644 --- a/llvm/test/CodeGen/MIR/Generic/llvmIR.mir +++ b/llvm/test/CodeGen/MIR/Generic/llvmIR.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the LLVM IR that's embedded with MIR is parsed # correctly. diff --git a/llvm/test/CodeGen/MIR/Generic/llvmIRMissing.mir b/llvm/test/CodeGen/MIR/Generic/llvmIRMissing.mir index 78c87869d47..9d4fe885bc0 100644 --- a/llvm/test/CodeGen/MIR/Generic/llvmIRMissing.mir +++ b/llvm/test/CodeGen/MIR/Generic/llvmIRMissing.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 2>&1 | FileCheck %s +# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s 2>&1 | FileCheck %s # This test ensures that the MIR parser accepts files without the LLVM IR. --- diff --git a/llvm/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir b/llvm/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir index 26834bbac97..22af2705ba0 100644 --- a/llvm/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir +++ b/llvm/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 2>&1 | FileCheck %s +# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s 2>&1 | FileCheck %s # This test ensures that the MIR parser preserves unnamed LLVM IR block # references. diff --git a/llvm/test/CodeGen/MIR/Generic/machine-function.mir b/llvm/test/CodeGen/MIR/Generic/machine-function.mir index 702c49888ea..474f69345a3 100644 --- a/llvm/test/CodeGen/MIR/Generic/machine-function.mir +++ b/llvm/test/CodeGen/MIR/Generic/machine-function.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses machine functions correctly. --- | diff --git a/llvm/test/CodeGen/MIR/Generic/multiRunPass.mir b/llvm/test/CodeGen/MIR/Generic/multiRunPass.mir index b0d21711a19..bca007de80b 100644 --- a/llvm/test/CodeGen/MIR/Generic/multiRunPass.mir +++ b/llvm/test/CodeGen/MIR/Generic/multiRunPass.mir @@ -1,7 +1,7 @@ -# RUN: llc -run-pass expand-isel-pseudos -run-pass peephole-opt -debug-pass=Arguments -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE -# RUN: llc -run-pass expand-isel-pseudos,peephole-opt -debug-pass=Arguments -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE -# RUN: llc -run-pass peephole-opt -run-pass expand-isel-pseudos -debug-pass=Arguments -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO -# RUN: llc -run-pass peephole-opt,expand-isel-pseudos -debug-pass=Arguments -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO +# RUN: llc -run-pass expand-isel-pseudos -run-pass peephole-opt -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE +# RUN: llc -run-pass expand-isel-pseudos,peephole-opt -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE +# RUN: llc -run-pass peephole-opt -run-pass expand-isel-pseudos -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO +# RUN: llc -run-pass peephole-opt,expand-isel-pseudos -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO # REQUIRES: asserts # This test ensures that the command line accepts diff --git a/llvm/test/CodeGen/MIR/Generic/register-info.mir b/llvm/test/CodeGen/MIR/Generic/register-info.mir index 14ca734eea5..1e2de796bb3 100644 --- a/llvm/test/CodeGen/MIR/Generic/register-info.mir +++ b/llvm/test/CodeGen/MIR/Generic/register-info.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses machine register info properties # correctly. diff --git a/llvm/test/CodeGen/MIR/Hexagon/anti-dep-partial.mir b/llvm/test/CodeGen/MIR/Hexagon/anti-dep-partial.mir index 1d9e4ae64c3..a83c53e57cd 100644 --- a/llvm/test/CodeGen/MIR/Hexagon/anti-dep-partial.mir +++ b/llvm/test/CodeGen/MIR/Hexagon/anti-dep-partial.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=hexagon -post-RA-scheduler -run-pass post-RA-sched %s 2>&1 -o /dev/null | FileCheck %s +# RUN: llc -march=hexagon -post-RA-scheduler -run-pass post-RA-sched %s -o - | FileCheck %s --- | declare void @check(i64, i32, i32, i64) diff --git a/llvm/test/CodeGen/MIR/Lanai/peephole-compare.mir b/llvm/test/CodeGen/MIR/Lanai/peephole-compare.mir index 63414357746..763fe2b9b96 100644 --- a/llvm/test/CodeGen/MIR/Lanai/peephole-compare.mir +++ b/llvm/test/CodeGen/MIR/Lanai/peephole-compare.mir @@ -1,4 +1,4 @@ -# RUN: llc -run-pass=peephole-opt %s -o /dev/null 2>&1 | FileCheck %s +# RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s # Test the compare fold peephole. diff --git a/llvm/test/CodeGen/MIR/Mips/memory-operands.mir b/llvm/test/CodeGen/MIR/Mips/memory-operands.mir index e3d84bff675..d9e7a0ce229 100644 --- a/llvm/test/CodeGen/MIR/Mips/memory-operands.mir +++ b/llvm/test/CodeGen/MIR/Mips/memory-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the call entry pseudo source # values in memory operands correctly. diff --git a/llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir b/llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir index 00051abf663..7defaeab949 100644 --- a/llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir +++ b/llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses floating point constant operands # correctly. diff --git a/llvm/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir b/llvm/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir index eee8ca52a5a..3e9022f5ff0 100644 --- a/llvm/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir +++ b/llvm/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=powerpc64-unknown-linux-gnu -start-after machine-combiner -stop-after machine-combiner -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -mtriple=powerpc64-unknown-linux-gnu -start-after machine-combiner -stop-after machine-combiner -o - %s | FileCheck %s # PR24724 --- | diff --git a/llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir b/llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir index 20d2ff30486..a96152fb389 100644 --- a/llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir +++ b/llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses basic block liveins correctly. --- | diff --git a/llvm/test/CodeGen/MIR/X86/block-address-operands.mir b/llvm/test/CodeGen/MIR/X86/block-address-operands.mir index 7af8997070f..d6dadb9775f 100644 --- a/llvm/test/CodeGen/MIR/X86/block-address-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/block-address-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the block address operands # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir b/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir index 772d03b0ba5..7870180960f 100644 --- a/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir +++ b/llvm/test/CodeGen/MIR/X86/callee-saved-info.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o - %s | FileCheck %s # This test ensures that the MIR parser parses callee saved information in the # stack objects correctly. diff --git a/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir b/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir index d143b37d13b..38b94fd8f19 100644 --- a/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir +++ b/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the .cfi_def_cfa_offset operands # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir b/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir index fe2e32c2e96..ead76f6f538 100644 --- a/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir +++ b/llvm/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the .cfi_def_cfa_register # operands correctly. diff --git a/llvm/test/CodeGen/MIR/X86/cfi-offset.mir b/llvm/test/CodeGen/MIR/X86/cfi-offset.mir index 6ad1ac248af..e84a1889756 100644 --- a/llvm/test/CodeGen/MIR/X86/cfi-offset.mir +++ b/llvm/test/CodeGen/MIR/X86/cfi-offset.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the .cfi_offset operands # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/constant-pool.mir b/llvm/test/CodeGen/MIR/X86/constant-pool.mir index 31bb7196690..36f15cce6dc 100644 --- a/llvm/test/CodeGen/MIR/X86/constant-pool.mir +++ b/llvm/test/CodeGen/MIR/X86/constant-pool.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses constant pool constants and # constant pool operands correctly. diff --git a/llvm/test/CodeGen/MIR/X86/dead-register-flag.mir b/llvm/test/CodeGen/MIR/X86/dead-register-flag.mir index 91c071686b8..7f29b9afcd2 100644 --- a/llvm/test/CodeGen/MIR/X86/dead-register-flag.mir +++ b/llvm/test/CodeGen/MIR/X86/dead-register-flag.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the 'dead' register flags # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir b/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir index 463d17c5595..41492849823 100644 --- a/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir +++ b/llvm/test/CodeGen/MIR/X86/early-clobber-register-flag.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the 'early-clobber' register # flags correctly. diff --git a/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir b/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir index 231acfae8b9..0ac5bb15f59 100644 --- a/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the external symbol machine # operands correctly. diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir index af7d579bd74..50c15914d90 100644 --- a/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses fixed stack memory operands # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir index 15cfdb6c1f5..81272c3549f 100644 --- a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir +++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses fixed stack objects correctly. --- | diff --git a/llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir b/llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir index 8477b1f58ed..fbdde2c75cf 100644 --- a/llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir +++ b/llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -enable-shrink-wrap=true -start-after shrink-wrap -stop-after shrink-wrap -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -enable-shrink-wrap=true -start-after shrink-wrap -stop-after shrink-wrap -o - %s | FileCheck %s # This test ensures that the MIR parser parses the save and restore points in # the machine frame info correctly. diff --git a/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir b/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir index bce371cc253..468e8c3c300 100644 --- a/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir +++ b/llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the stack protector stack # object reference in the machine frame info correctly. diff --git a/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir b/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir index e8718417fc6..11d72d9e31e 100644 --- a/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir +++ b/llvm/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the frame setup instruction flag. --- | diff --git a/llvm/test/CodeGen/MIR/X86/function-liveins.mir b/llvm/test/CodeGen/MIR/X86/function-liveins.mir index 6da44b21552..852cb883c2c 100644 --- a/llvm/test/CodeGen/MIR/X86/function-liveins.mir +++ b/llvm/test/CodeGen/MIR/X86/function-liveins.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s # This test ensures that the MIR parser parses machine function's liveins # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/generic-virtual-registers.mir b/llvm/test/CodeGen/MIR/X86/generic-virtual-registers.mir index f3692e75870..9aae07bd044 100644 --- a/llvm/test/CodeGen/MIR/X86/generic-virtual-registers.mir +++ b/llvm/test/CodeGen/MIR/X86/generic-virtual-registers.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s # REQUIRES: global-isel # This test ensures that the MIR parser parses generic virtual # register definitions correctly. diff --git a/llvm/test/CodeGen/MIR/X86/global-value-operands.mir b/llvm/test/CodeGen/MIR/X86/global-value-operands.mir index 7287b62393c..b83d8026ce3 100644 --- a/llvm/test/CodeGen/MIR/X86/global-value-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/global-value-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses global value operands correctly. --- | diff --git a/llvm/test/CodeGen/MIR/X86/immediate-operands.mir b/llvm/test/CodeGen/MIR/X86/immediate-operands.mir index 2f4c4421a90..664debe1f92 100644 --- a/llvm/test/CodeGen/MIR/X86/immediate-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/immediate-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses immediate machine operands. --- | diff --git a/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir b/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir index 83e2ddef89d..5f68ffd0f0e 100644 --- a/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir +++ b/llvm/test/CodeGen/MIR/X86/implicit-register-flag.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the 'implicit' and 'implicit-def' # register flags correctly. diff --git a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir index 5198511417c..6c6664ba552 100644 --- a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir +++ b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after block-placement -stop-after block-placement -o - %s | FileCheck %s --- | define i64 @test(i64 %x, i64 %y) #0 { diff --git a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir index 53f11ec37ff..478f02dfa73 100644 --- a/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir +++ b/llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s # This test ensures that the MIR parser parses the machine instruction's # debug location metadata correctly. diff --git a/llvm/test/CodeGen/MIR/X86/jump-table-info.mir b/llvm/test/CodeGen/MIR/X86/jump-table-info.mir index cc6188d62af..5d1438eebff 100644 --- a/llvm/test/CodeGen/MIR/X86/jump-table-info.mir +++ b/llvm/test/CodeGen/MIR/X86/jump-table-info.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the jump table info and jump # table operands correctly. diff --git a/llvm/test/CodeGen/MIR/X86/killed-register-flag.mir b/llvm/test/CodeGen/MIR/X86/killed-register-flag.mir index 50e7eff6de3..71337a50f2d 100644 --- a/llvm/test/CodeGen/MIR/X86/killed-register-flag.mir +++ b/llvm/test/CodeGen/MIR/X86/killed-register-flag.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the 'killed' register flags # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/liveout-register-mask.mir b/llvm/test/CodeGen/MIR/X86/liveout-register-mask.mir index 06c821b7edd..47ff233a492 100644 --- a/llvm/test/CodeGen/MIR/X86/liveout-register-mask.mir +++ b/llvm/test/CodeGen/MIR/X86/liveout-register-mask.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after stackmap-liveness -stop-after stackmap-liveness -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after stackmap-liveness -stop-after stackmap-liveness -o - %s | FileCheck %s # This test ensures that the MIR parser parses the liveout register mask # machine operands correctly. diff --git a/llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir b/llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir index 99258a95d67..d49049b8e2c 100644 --- a/llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses machine basic block operands. --- | diff --git a/llvm/test/CodeGen/MIR/X86/machine-instructions.mir b/llvm/test/CodeGen/MIR/X86/machine-instructions.mir index 3b0890ed1c3..a01d9e6945a 100644 --- a/llvm/test/CodeGen/MIR/X86/machine-instructions.mir +++ b/llvm/test/CodeGen/MIR/X86/machine-instructions.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses X86 machine instructions # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/memory-operands.mir b/llvm/test/CodeGen/MIR/X86/memory-operands.mir index 38846933b93..3078666ad03 100644 --- a/llvm/test/CodeGen/MIR/X86/memory-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/memory-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the machine memory operands # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/metadata-operands.mir b/llvm/test/CodeGen/MIR/X86/metadata-operands.mir index 0ee25dd830a..691daab3783 100644 --- a/llvm/test/CodeGen/MIR/X86/metadata-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/metadata-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s # This test ensures that the MIR parser parses the metadata machine operands # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/named-registers.mir b/llvm/test/CodeGen/MIR/X86/named-registers.mir index e2dd8147055..b3f8c28de1b 100644 --- a/llvm/test/CodeGen/MIR/X86/named-registers.mir +++ b/llvm/test/CodeGen/MIR/X86/named-registers.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses X86 registers correctly. --- | diff --git a/llvm/test/CodeGen/MIR/X86/newline-handling.mir b/llvm/test/CodeGen/MIR/X86/newline-handling.mir index 6e8154003ff..942eb41d7c8 100644 --- a/llvm/test/CodeGen/MIR/X86/newline-handling.mir +++ b/llvm/test/CodeGen/MIR/X86/newline-handling.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s --- | diff --git a/llvm/test/CodeGen/MIR/X86/null-register-operands.mir b/llvm/test/CodeGen/MIR/X86/null-register-operands.mir index 6672fd03547..371555a56b4 100644 --- a/llvm/test/CodeGen/MIR/X86/null-register-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/null-register-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses null register operands correctly. --- | diff --git a/llvm/test/CodeGen/MIR/X86/register-mask-operands.mir b/llvm/test/CodeGen/MIR/X86/register-mask-operands.mir index 3b01e58d661..c6edd7ae368 100644 --- a/llvm/test/CodeGen/MIR/X86/register-mask-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/register-mask-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses register mask operands correctly. --- | diff --git a/llvm/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir b/llvm/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir index 6ed7709ac44..7dcdcd0ed93 100644 --- a/llvm/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir +++ b/llvm/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o - %s | FileCheck %s # This test ensures that the MIR parser parses simple register allocation hints # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir index b7fb4e0a2bc..9dd3588ea10 100644 --- a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir +++ b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses fixed stack objects correctly. --- | diff --git a/llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir b/llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir index 54f4e822b5f..32aed3a3286 100644 --- a/llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir +++ b/llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s # This test ensures that the MIR parser parses the stack object's debug info # correctly. --- | diff --git a/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir b/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir index 050cde77b66..97d38647427 100644 --- a/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/stack-object-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s # This test ensures that the MIR parser parses stack object machine operands # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/stack-objects.mir b/llvm/test/CodeGen/MIR/X86/stack-objects.mir index 7e2bcd2eeeb..67a1742a854 100644 --- a/llvm/test/CodeGen/MIR/X86/stack-objects.mir +++ b/llvm/test/CodeGen/MIR/X86/stack-objects.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses stack objects correctly. --- | diff --git a/llvm/test/CodeGen/MIR/X86/subregister-index-operands.mir b/llvm/test/CodeGen/MIR/X86/subregister-index-operands.mir index 823fcd582df..12eeb3db28b 100644 --- a/llvm/test/CodeGen/MIR/X86/subregister-index-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/subregister-index-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s # This test ensures that the MIR parser parses and prints subregisters index # operands correctly. diff --git a/llvm/test/CodeGen/MIR/X86/subregister-operands.mir b/llvm/test/CodeGen/MIR/X86/subregister-operands.mir index a02af765e6a..f7168a67e6b 100644 --- a/llvm/test/CodeGen/MIR/X86/subregister-operands.mir +++ b/llvm/test/CodeGen/MIR/X86/subregister-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s # This test ensures that the MIR parser parses subregisters in register operands # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir index d8ce8363cf0..d33dd45450f 100644 --- a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir +++ b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses basic block successors and # probabilities correctly. diff --git a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir index 655019ba017..3293aeb233c 100644 --- a/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir +++ b/llvm/test/CodeGen/MIR/X86/successor-basic-blocks.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses basic block successors correctly. --- | diff --git a/llvm/test/CodeGen/MIR/X86/undef-register-flag.mir b/llvm/test/CodeGen/MIR/X86/undef-register-flag.mir index 03af0272c16..f6584768f7c 100644 --- a/llvm/test/CodeGen/MIR/X86/undef-register-flag.mir +++ b/llvm/test/CodeGen/MIR/X86/undef-register-flag.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the 'undef' register flags # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/used-physical-register-info.mir b/llvm/test/CodeGen/MIR/X86/used-physical-register-info.mir index 05bb0895585..c30c53e7e8f 100644 --- a/llvm/test/CodeGen/MIR/X86/used-physical-register-info.mir +++ b/llvm/test/CodeGen/MIR/X86/used-physical-register-info.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses the callee saved register mask # correctly and that the MIR parser can infer it as well. diff --git a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir index be363f8c5b3..1ed74774f1a 100644 --- a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir +++ b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o - %s | FileCheck %s # This test ensures that the MIR parser parses variable sized stack objects # correctly. diff --git a/llvm/test/CodeGen/MIR/X86/virtual-registers.mir b/llvm/test/CodeGen/MIR/X86/virtual-registers.mir index 0fd860bcb7c..153356f838e 100644 --- a/llvm/test/CodeGen/MIR/X86/virtual-registers.mir +++ b/llvm/test/CodeGen/MIR/X86/virtual-registers.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s # This test ensures that the MIR parser parses virtual register definitions and # references correctly. diff --git a/llvm/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir b/llvm/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir index 4a1cbf93ccb..76702ce50fd 100644 --- a/llvm/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir +++ b/llvm/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after=dead-mi-elimination -stop-after=twoaddressinstruction -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -start-after=dead-mi-elimination -stop-after=twoaddressinstruction -o - %s | FileCheck %s --- | target datalayout = "E-m:e-i64:64-n32:64" diff --git a/llvm/test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir b/llvm/test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir index 011821f275b..b835ce71c41 100644 --- a/llvm/test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir +++ b/llvm/test/CodeGen/PowerPC/opt-sub-inst-cr0-live.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after=machine-sink -stop-after=peephole-opt -mtriple=powerpc64-unknown-linux-gnu -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -start-after=machine-sink -stop-after=peephole-opt -mtriple=powerpc64-unknown-linux-gnu -o - %s | FileCheck %s --- | ; ModuleID = '<stdin>' diff --git a/llvm/test/CodeGen/PowerPC/stackmap-frame-setup.ll b/llvm/test/CodeGen/PowerPC/stackmap-frame-setup.ll index b83375e3b48..b5f1d4cfe4b 100644 --- a/llvm/test/CodeGen/PowerPC/stackmap-frame-setup.ll +++ b/llvm/test/CodeGen/PowerPC/stackmap-frame-setup.ll @@ -1,5 +1,5 @@ -; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL -; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL +; RUN: llc -o - -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL +; RUN: llc -o - -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL define void @caller_meta_leaf() { entry: diff --git a/llvm/test/CodeGen/X86/eflags-copy-expansion.mir b/llvm/test/CodeGen/X86/eflags-copy-expansion.mir index 03f9072dc0e..bf2d0be67c1 100644 --- a/llvm/test/CodeGen/X86/eflags-copy-expansion.mir +++ b/llvm/test/CodeGen/X86/eflags-copy-expansion.mir @@ -1,4 +1,4 @@ -# RUN: llc -run-pass postrapseudos -mtriple=i386-apple-macosx -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -run-pass postrapseudos -mtriple=i386-apple-macosx -o - %s | FileCheck %s # Verify that we correctly save and restore eax when copying eflags, # even when only a smaller alias of eax is used. We used to check only diff --git a/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir b/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir index 5ee58478c61..3598c045ad5 100644 --- a/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir +++ b/llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir @@ -1,4 +1,4 @@ -# RUN: llc -run-pass postrapseudos -mtriple=x86_64-unknown-unknown -mattr=+3dnow -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -run-pass postrapseudos -mtriple=x86_64-unknown-unknown -mattr=+3dnow -o - %s | FileCheck %s # This test verifies that the ExpandPostRA pass expands the GR64 <-> VR64 # copies into appropriate MMX_MOV instructions. diff --git a/llvm/test/CodeGen/X86/fixup-bw-copy.mir b/llvm/test/CodeGen/X86/fixup-bw-copy.mir index a99500026b6..beff513cdbf 100644 --- a/llvm/test/CodeGen/X86/fixup-bw-copy.mir +++ b/llvm/test/CodeGen/X86/fixup-bw-copy.mir @@ -1,4 +1,4 @@ -# RUN: llc -run-pass x86-fixup-bw-insts -mtriple=x86_64-- -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -run-pass x86-fixup-bw-insts -mtriple=x86_64-- -o - %s | FileCheck %s # Verify that we correctly deal with the flag edge cases when replacing # copies by bigger copies, which is a pretty unusual transform. diff --git a/llvm/test/CodeGen/X86/implicit-null-checks.mir b/llvm/test/CodeGen/X86/implicit-null-checks.mir index 81f51edd6a4..9e83964247e 100644 --- a/llvm/test/CodeGen/X86/implicit-null-checks.mir +++ b/llvm/test/CodeGen/X86/implicit-null-checks.mir @@ -1,4 +1,4 @@ -# RUN: llc -run-pass implicit-null-checks -mtriple=x86_64-apple-macosx -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -run-pass implicit-null-checks -mtriple=x86_64-apple-macosx -o - %s | FileCheck %s --- | target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" diff --git a/llvm/test/CodeGen/X86/machine-combiner-int.ll b/llvm/test/CodeGen/X86/machine-combiner-int.ll index 7951a92c524..df35abd9534 100644 --- a/llvm/test/CodeGen/X86/machine-combiner-int.ll +++ b/llvm/test/CodeGen/X86/machine-combiner-int.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after machine-combiner -o /dev/null 2>&1 | FileCheck %s --check-prefix=DEAD +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after machine-combiner -o - | FileCheck %s --check-prefix=DEAD ; Verify that integer multiplies are reassociated. The first multiply in ; each test should be independent of the result of the preceding add (lea). diff --git a/llvm/test/CodeGen/X86/machine-copy-prop.mir b/llvm/test/CodeGen/X86/machine-copy-prop.mir index ca5139a28c8..c2cb4ceb7fb 100644 --- a/llvm/test/CodeGen/X86/machine-copy-prop.mir +++ b/llvm/test/CodeGen/X86/machine-copy-prop.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86 -run-pass machine-cp -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86 -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s --- | declare void @foo() diff --git a/llvm/test/CodeGen/X86/patchpoint-verifiable.mir b/llvm/test/CodeGen/X86/patchpoint-verifiable.mir index 300ecaf002f..c108473a182 100644 --- a/llvm/test/CodeGen/X86/patchpoint-verifiable.mir +++ b/llvm/test/CodeGen/X86/patchpoint-verifiable.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=x86_64-apple-darwin -stop-after branch-folder -start-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -mtriple=x86_64-apple-darwin -stop-after branch-folder -start-after branch-folder -o - %s | FileCheck %s # This test verifies that the machine verifier won't report an error when # verifying the PATCHPOINT instruction. diff --git a/llvm/test/CodeGen/X86/pr27681.mir b/llvm/test/CodeGen/X86/pr27681.mir index 0043ac1d417..9473a21d732 100644 --- a/llvm/test/CodeGen/X86/pr27681.mir +++ b/llvm/test/CodeGen/X86/pr27681.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=i386-unknown-linux-gnu -mcpu=slm -run-pass post-RA-sched -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -mtriple=i386-unknown-linux-gnu -mcpu=slm -run-pass post-RA-sched -o - %s | FileCheck %s # # Verify that the critical antidependence breaker does not consider # a high byte register as available as a replacement register diff --git a/llvm/test/CodeGen/X86/stackmap-frame-setup.ll b/llvm/test/CodeGen/X86/stackmap-frame-setup.ll index a451f900a4b..b83a8d61f6a 100644 --- a/llvm/test/CodeGen/X86/stackmap-frame-setup.ll +++ b/llvm/test/CodeGen/X86/stackmap-frame-setup.ll @@ -1,5 +1,5 @@ -; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL -; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL +; RUN: llc -o - -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL +; RUN: llc -o - -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL define void @caller_meta_leaf() { entry: diff --git a/llvm/test/CodeGen/X86/update-terminator.mir b/llvm/test/CodeGen/X86/update-terminator.mir index 72898cf74b4..1e75c6af9eb 100644 --- a/llvm/test/CodeGen/X86/update-terminator.mir +++ b/llvm/test/CodeGen/X86/update-terminator.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -verify-machineinstrs -run-pass block-placement -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -verify-machineinstrs -run-pass block-placement -o - %s | FileCheck %s # Check the conditional jump in bb.1 is changed to unconditional after block placement swaps bb.2 and bb.3. --- | diff --git a/llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll b/llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll index c8f7f70c360..0eb17fb6c14 100644 --- a/llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll +++ b/llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after machine-scheduler %s 2>&1 | FileCheck %s --check-prefix=PRE-RA -; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after prologepilog %s 2>&1 | FileCheck %s --check-prefix=POST-RA +; RUN: llc -mtriple=x86_64-unknown-unknown -o - -stop-after machine-scheduler %s | FileCheck %s --check-prefix=PRE-RA +; RUN: llc -mtriple=x86_64-unknown-unknown -o - -stop-after prologepilog %s | FileCheck %s --check-prefix=POST-RA ; This test verifies that the virtual register references in machine function's ; liveins are cleared after register allocation. diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir index 5baa9e6136a..8a02c9a1441 100644 --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir @@ -1,4 +1,4 @@ -# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o - %s | FileCheck %s # Test the extension of debug ranges from 3 predecessors. # Generated from the source file LiveDebugValues-3preds.c: diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir index a56746a80e5..7709bb0e7de 100644 --- a/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir +++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values.mir @@ -1,4 +1,4 @@ -# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o - %s | FileCheck %s # Test the extension of debug ranges from predecessors. # Generated from the source file LiveDebugValues.c: diff --git a/llvm/test/DebugInfo/X86/bbjoin.ll b/llvm/test/DebugInfo/X86/bbjoin.ll index 83d0c9f1631..2055fe3f191 100644 --- a/llvm/test/DebugInfo/X86/bbjoin.ll +++ b/llvm/test/DebugInfo/X86/bbjoin.ll @@ -1,5 +1,5 @@ ; RUN: llc -mtriple=x86_64-apple-macosx10.9.0 %s -stop-after=livedebugvars \ -; RUN: -o %t.s 2>&1 | FileCheck %s +; RUN: -o - | FileCheck %s ; Generated from: ; void g(int *); ; int f() { diff --git a/llvm/test/DebugInfo/X86/float_const_loclist.ll b/llvm/test/DebugInfo/X86/float_const_loclist.ll index fb95448d24e..b03a91de334 100644 --- a/llvm/test/DebugInfo/X86/float_const_loclist.ll +++ b/llvm/test/DebugInfo/X86/float_const_loclist.ll @@ -1,4 +1,4 @@ -; RUN: llc %s -stop-after=livedebugvalues -o %t 2>&1 | FileCheck --check-prefix=SANITY %s +; RUN: llc %s -stop-after=livedebugvalues -o - | FileCheck --check-prefix=SANITY %s ; RUN: llc < %s -filetype=obj | llvm-dwarfdump - | FileCheck %s ; Test debug_loc support for floating point constants. ; diff --git a/llvm/test/DebugInfo/X86/safestack-byval.ll b/llvm/test/DebugInfo/X86/safestack-byval.ll index 27668226b52..42e94698818 100644 --- a/llvm/test/DebugInfo/X86/safestack-byval.ll +++ b/llvm/test/DebugInfo/X86/safestack-byval.ll @@ -1,7 +1,7 @@ ; Test dwarf codegen for DILocalVariable of a byval function argument that ; points to neither an argument nor an alloca. This kind of IR is generated by ; SafeStack for unsafe byval arguments. -; RUN: llc -mtriple=x86_64-unknown-unknown -stop-after expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s +; RUN: llc -mtriple=x86_64-unknown-unknown -stop-after expand-isel-pseudos %s -o - | FileCheck %s ; This was built by compiling the following source with SafeStack and ; simplifying the result a little. diff --git a/llvm/test/DebugInfo/X86/single-dbg_value.ll b/llvm/test/DebugInfo/X86/single-dbg_value.ll index 39221e7a9b4..0275c37d24e 100644 --- a/llvm/test/DebugInfo/X86/single-dbg_value.ll +++ b/llvm/test/DebugInfo/X86/single-dbg_value.ll @@ -1,4 +1,4 @@ -; RUN: %llc_dwarf -stop-after=livedebugvalues -o /dev/null %s 2>&1 \ +; RUN: %llc_dwarf -stop-after=livedebugvalues -o - %s \ ; RUN: | FileCheck %s --check-prefix=SANITY ; RUN: %llc_dwarf -march=x86-64 -o - %s -filetype=obj \ ; RUN: | llvm-dwarfdump -debug-dump=all - | FileCheck %s diff --git a/llvm/tools/llc/llc.cpp b/llvm/tools/llc/llc.cpp index 612a0497737..f30dbd2a1c4 100644 --- a/llvm/tools/llc/llc.cpp +++ b/llvm/tools/llc/llc.cpp @@ -440,7 +440,7 @@ static int compileModule(char **argv, LLVMContext &Context) { PM.add(P); TPC->printAndVerify(Banner); } - PM.add(createPrintMIRPass(errs())); + PM.add(createPrintMIRPass(*OS)); } else { if (!StartAfter.empty()) { const PassInfo *PI = PR->getPassInfo(StartAfter); |
