diff options
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrVSX.td | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/instr-properties.ll | 9 |
2 files changed, 10 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td index 750c5d421f4..a2b27cd921e 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td +++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td @@ -152,7 +152,6 @@ def HasOnlySwappingMemOps : Predicate<"!PPCSubTarget->hasP9Vector()">; let Predicates = [HasVSX] in { let AddedComplexity = 400 in { // Prefer VSX patterns over non-VSX patterns. let hasSideEffects = 0 in { // VSX instructions don't have side effects. -let Uses = [RM] in { // Load indexed instructions let mayLoad = 1, mayStore = 0 in { @@ -214,6 +213,7 @@ let Uses = [RM] in { } } // mayStore + let Uses = [RM] in { // Add/Mul Instructions let isCommutable = 1 in { def XSADDDP : XX3Form<60, 32, diff --git a/llvm/test/CodeGen/PowerPC/instr-properties.ll b/llvm/test/CodeGen/PowerPC/instr-properties.ll new file mode 100644 index 00000000000..8d711528830 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/instr-properties.ll @@ -0,0 +1,9 @@ +; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -verify-misched -stop-after=machine-scheduler -o - | FileCheck %s --check-prefix=CHECK-P8 + +; Verify XFLOADf64 didn't implict def 'rm'. +define double @rm() { +; CHECK-P8-LABEL: bb.0.entry +; CHECK-P8: %{{[0-9]+}}:vsfrc = XFLOADf64 $zero8, %{{[0-9]+}} :: +entry: + ret double 2.300000e+00 +} |
