diff options
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64FastISel.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/i128-fast-isel-fallback.ll | 18 |
2 files changed, 24 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp index cc2a70ee8a2..d822c1bf327 100644 --- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp +++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp @@ -1750,6 +1750,12 @@ unsigned AArch64FastISel::Emiti1Ext(unsigned SrcReg, MVT DestVT, bool isZExt) { unsigned AArch64FastISel::EmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt) { assert(DestVT != MVT::i1 && "ZeroExt/SignExt an i1?"); + + // FastISel does not have plumbing to deal with an MVT::i128, if we see one + // so rather than return one we need to bail out to SelectionDAG. + if (DestVT == MVT::i128) + return 0; + unsigned Opc; unsigned Imm = 0; diff --git a/llvm/test/CodeGen/AArch64/i128-fast-isel-fallback.ll b/llvm/test/CodeGen/AArch64/i128-fast-isel-fallback.ll new file mode 100644 index 00000000000..1cffbf3de05 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/i128-fast-isel-fallback.ll @@ -0,0 +1,18 @@ +; RUN: llc -O0 -mtriple=arm64-apple-ios7.0 -mcpu=generic < %s | FileCheck %s + +; Function Attrs: nounwind ssp +define void @test1() { + %1 = sext i32 0 to i128 + call void @test2(i128 %1) + ret void + +; The i128 is 0 so the we can test to make sure it is propogated into the x +; registers that make up the i128 pair + +; CHECK: mov x0, xzr +; CHECK: mov x1, x0 +; CHECK: bl _test2 + +} + +declare void @test2(i128) |
