diff options
20 files changed, 52 insertions, 49 deletions
diff --git a/llvm/include/llvm/TableGen/Record.h b/llvm/include/llvm/TableGen/Record.h index e3de7441545..55c3d23e4b6 100644 --- a/llvm/include/llvm/TableGen/Record.h +++ b/llvm/include/llvm/TableGen/Record.h @@ -617,7 +617,7 @@ public: static StringInit *get(StringRef); - const std::string &getValue() const { return Value; } + StringRef getValue() const { return Value; } Init *convertInitializerTo(RecTy *Ty) const override; @@ -655,7 +655,7 @@ public: static CodeInit *get(StringRef); - const std::string &getValue() const { return Value; } + StringRef getValue() const { return Value; } Init *convertInitializerTo(RecTy *Ty) const override; @@ -964,7 +964,7 @@ public: static VarInit *get(StringRef VN, RecTy *T); static VarInit *get(Init *VN, RecTy *T); - const std::string &getName() const; + StringRef getName() const; Init *getNameInit() const { return VarName; } std::string getNameInitAsString() const { @@ -1179,14 +1179,14 @@ public: Init *getOperator() const { return Val; } - const std::string &getName() const { return ValName; } + StringRef getName() const { return ValName; } unsigned getNumArgs() const { return Args.size(); } Init *getArg(unsigned Num) const { assert(Num < Args.size() && "Arg number out of range!"); return Args[Num]; } - const std::string &getArgName(unsigned Num) const { + StringRef getArgName(unsigned Num) const { assert(Num < ArgNames.size() && "Arg number out of range!"); return ArgNames[Num]; } @@ -1233,7 +1233,7 @@ public: RecordVal(Init *N, RecTy *T, bool P); RecordVal(StringRef N, RecTy *T, bool P); - const std::string &getName() const; + StringRef getName() const; const Init *getNameInit() const { return NameAndPrefix.getPointer(); } std::string getNameInitAsString() const { @@ -1324,7 +1324,7 @@ public: unsigned getID() const { return ID; } - const std::string &getName() const; + StringRef getName() const; Init *getNameInit() const { return Name; } diff --git a/llvm/lib/TableGen/Record.cpp b/llvm/lib/TableGen/Record.cpp index a82c38186db..7fa20d115e0 100644 --- a/llvm/lib/TableGen/Record.cpp +++ b/llvm/lib/TableGen/Record.cpp @@ -47,7 +47,7 @@ public: TableGenStringKey(StringRef str) : data(str) {} TableGenStringKey(const char *str) : data(str) {} - const std::string &str() const { return data; } + StringRef str() const { return data; } friend hash_code hash_value(const TableGenStringKey &Value) { using llvm::hash_value; @@ -667,7 +667,7 @@ Init *UnOpInit::Fold(Record *CurRec, MultiClass *CurMultiClass) const { return StringInit::get(LHSi->getAsString()); } else { if (StringInit *LHSs = dyn_cast<StringInit>(LHS)) { - const std::string &Name = LHSs->getValue(); + StringRef Name = LHSs->getValue(); // From TGParser::ParseIDValue if (CurRec) { @@ -1298,7 +1298,7 @@ VarInit *VarInit::get(Init *VN, RecTy *T) { return I.get(); } -const std::string &VarInit::getName() const { +StringRef VarInit::getName() const { StringInit *NameString = cast<StringInit>(getNameInit()); return NameString->getValue(); } @@ -1612,7 +1612,7 @@ RecordVal::RecordVal(StringRef N, RecTy *T, bool P) assert(Value && "Cannot create unset value for current type!"); } -const std::string &RecordVal::getName() const { +StringRef RecordVal::getName() const { return cast<StringInit>(getNameInit())->getValue(); } @@ -1652,7 +1652,7 @@ DefInit *Record::getDefInit() { return TheInit.get(); } -const std::string &Record::getName() const { +StringRef Record::getName() const { return cast<StringInit>(Name)->getValue(); } diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp index f80ab8e69f3..a403ab7d6b5 100644 --- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp +++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp @@ -1289,10 +1289,10 @@ buildRegisterClasses(SmallPtrSetImpl<Record*> &SingletonRegisters) { if (CI->ValueName.empty()) { CI->ClassName = Rec->getName(); - CI->Name = "MCK_" + Rec->getName(); + CI->Name = "MCK_" + Rec->getName().str(); CI->ValueName = Rec->getName(); } else - CI->ValueName = CI->ValueName + "," + Rec->getName(); + CI->ValueName = CI->ValueName + "," + Rec->getName().str(); } } @@ -1819,7 +1819,7 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName, size_t MaxRowLength = 2; // minimum is custom converter plus terminator. // TargetOperandClass - This is the target's operand class, like X86Operand. - std::string TargetOperandClass = Target.getName() + "Operand"; + std::string TargetOperandClass = Target.getName().str() + "Operand"; // Write the convert function to a separate stream, so we can drop it after // the enum. We'll build up the conversion handlers for the individual @@ -2054,7 +2054,7 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName, Reg = "0"; } else { Reg = getQualifiedName(OpInfo.Register); - Name = "reg" + OpInfo.Register->getName(); + Name = "reg" + OpInfo.Register->getName().str(); } Signature += "__" + Name; Name = "CVT_" + Name; diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp index 5fab4a93b03..3d4f2ab30f5 100644 --- a/llvm/utils/TableGen/AsmWriterEmitter.cpp +++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp @@ -138,12 +138,12 @@ static void EmitInstructions(std::vector<AsmWriterInst> &Insts, O << " default: llvm_unreachable(\"Unexpected opcode.\");\n"; std::vector<std::pair<std::string, AsmWriterOperand>> OpsToPrint; OpsToPrint.push_back(std::make_pair(FirstInst.CGI->Namespace + "::" + - FirstInst.CGI->TheDef->getName(), + FirstInst.CGI->TheDef->getName().str(), FirstInst.Operands[i])); for (const AsmWriterInst &AWI : SimilarInsts) { - OpsToPrint.push_back(std::make_pair(AWI.CGI->Namespace+"::"+ - AWI.CGI->TheDef->getName(), + OpsToPrint.push_back(std::make_pair(AWI.CGI->Namespace+"::" + + AWI.CGI->TheDef->getName().str(), AWI.Operands[i])); } std::reverse(OpsToPrint.begin(), OpsToPrint.end()); @@ -865,9 +865,9 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { Record *R = CGA.ResultOperands[i].getRecord(); if (R->isSubClassOf("RegisterOperand")) R = R->getValueAsDef("RegClass"); - Cond = std::string("MRI.getRegClass(") + Target.getName() + "::" + - R->getName() + "RegClassID)" - ".contains(" + Op + ".getReg())"; + Cond = std::string("MRI.getRegClass(") + Target.getName().str() + + "::" + R->getName().str() + "RegClassID).contains(" + Op + + ".getReg())"; } else { Cond = Op + ".getReg() == MI->getOperand(" + utostr(IAP.getOpIndex(ROName)) + ").getReg()"; @@ -887,7 +887,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { } else break; // No conditions on this operand at all } - Cond = Target.getName() + ClassName + "ValidateMCOperand(" + + Cond = Target.getName().str() + ClassName + "ValidateMCOperand(" + Op + ", STI, " + utostr(Entry) + ")"; } // for all subcases of ResultOperand::K_Record: @@ -911,8 +911,8 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { break; } - Cond = Op + ".getReg() == " + Target.getName() + "::" + - CGA.ResultOperands[i].getRegister()->getName(); + Cond = Op + ".getReg() == " + Target.getName().str() + "::" + + CGA.ResultOperands[i].getRegister()->getName().str(); IAP.addCond(Cond); break; } diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp index fc2e5aa919e..f34c0ded0a3 100644 --- a/llvm/utils/TableGen/CodeEmitterGen.cpp +++ b/llvm/utils/TableGen/CodeEmitterGen.cpp @@ -279,7 +279,7 @@ void CodeEmitterGen::run(raw_ostream &o) { R->getValueAsBit("isPseudo")) continue; const std::string &InstName = R->getValueAsString("Namespace") + "::" - + R->getName(); + + R->getName().str(); std::string Case = getInstructionCase(R, Target); CaseMap[Case].push_back(InstName); diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp index 3cc7b1b4ec3..3bda5d05036 100644 --- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp +++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp @@ -755,7 +755,7 @@ bool TreePredicateFn::isAlwaysTrue() const { /// Return the name to use in the generated code to reference this, this is /// "Predicate_foo" if from a pattern fragment "foo". std::string TreePredicateFn::getFnName() const { - return "Predicate_" + PatFragRec->getRecord()->getName(); + return "Predicate_" + PatFragRec->getRecord()->getName().str(); } /// getCodeToRunOnSDNode - Return the code for the function body that diff --git a/llvm/utils/TableGen/CodeGenInstruction.cpp b/llvm/utils/TableGen/CodeGenInstruction.cpp index 4e9f182589b..6007e1c5b61 100644 --- a/llvm/utils/TableGen/CodeGenInstruction.cpp +++ b/llvm/utils/TableGen/CodeGenInstruction.cpp @@ -647,8 +647,8 @@ CodeGenInstAlias::CodeGenInstAlias(Record *R, unsigned Variant, // Take care to instantiate each of the suboperands with the correct // nomenclature: $foo.bar - ResultOperands.emplace_back(Result->getArgName(AliasOpNo) + "." + - MIOI->getArgName(SubOp), + ResultOperands.emplace_back(Result->getArgName(AliasOpNo).str() + + "." + MIOI->getArgName(SubOp).str(), SubRec); ResultInstOperandIndex.push_back(std::make_pair(i, SubOp)); } diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp index 9fc139245f3..6ce25fa6475 100644 --- a/llvm/utils/TableGen/CodeGenRegisters.cpp +++ b/llvm/utils/TableGen/CodeGenRegisters.cpp @@ -165,7 +165,7 @@ void CodeGenRegister::buildObjectGraph(CodeGenRegBank &RegBank) { } } -const std::string &CodeGenRegister::getName() const { +const StringRef CodeGenRegister::getName() const { assert(TheDef && "no def"); return TheDef->getName(); } diff --git a/llvm/utils/TableGen/CodeGenRegisters.h b/llvm/utils/TableGen/CodeGenRegisters.h index 827eef8cf66..7ef3d8b8413 100644 --- a/llvm/utils/TableGen/CodeGenRegisters.h +++ b/llvm/utils/TableGen/CodeGenRegisters.h @@ -145,7 +145,7 @@ namespace llvm { CodeGenRegister(Record *R, unsigned Enum); - const std::string &getName() const; + const StringRef getName() const; // Extract more information from TheDef. This is used to build an object // graph after all CodeGenRegister objects have been created. diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp index 2bc7032291f..6503d5af2d4 100644 --- a/llvm/utils/TableGen/CodeGenTarget.cpp +++ b/llvm/utils/TableGen/CodeGenTarget.cpp @@ -138,7 +138,7 @@ std::string llvm::getQualifiedName(const Record *R) { if (R->getValue("Namespace")) Namespace = R->getValueAsString("Namespace"); if (Namespace.empty()) return R->getName(); - return Namespace + "::" + R->getName(); + return Namespace + "::" + R->getName().str(); } @@ -157,7 +157,7 @@ CodeGenTarget::CodeGenTarget(RecordKeeper &records) CodeGenTarget::~CodeGenTarget() { } -const std::string &CodeGenTarget::getName() const { +const StringRef CodeGenTarget::getName() const { return TargetRec->getName(); } diff --git a/llvm/utils/TableGen/CodeGenTarget.h b/llvm/utils/TableGen/CodeGenTarget.h index 9a9522edc9b..c822e940ffa 100644 --- a/llvm/utils/TableGen/CodeGenTarget.h +++ b/llvm/utils/TableGen/CodeGenTarget.h @@ -82,7 +82,7 @@ public: ~CodeGenTarget(); Record *getTargetRecord() const { return TargetRec; } - const std::string &getName() const; + const StringRef getName() const; /// getInstNamespace - Return the target-specific instruction namespace. /// diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp index 0fe3bbd8d78..60fe866f194 100644 --- a/llvm/utils/TableGen/DAGISelEmitter.cpp +++ b/llvm/utils/TableGen/DAGISelEmitter.cpp @@ -121,7 +121,7 @@ struct PatternSortingPredicate { void DAGISelEmitter::run(raw_ostream &OS) { emitSourceFileHeader("DAG Instruction Selector for the " + - CGP.getTargetInfo().getName() + " target", OS); + CGP.getTargetInfo().getName().str() + " target", OS); OS << "// *** NOTE: This file is #included into the middle of the target\n" << "// *** instruction selector class. These functions are really " diff --git a/llvm/utils/TableGen/DAGISelMatcherGen.cpp b/llvm/utils/TableGen/DAGISelMatcherGen.cpp index 4110e9725b5..aafc1157893 100644 --- a/llvm/utils/TableGen/DAGISelMatcherGen.cpp +++ b/llvm/utils/TableGen/DAGISelMatcherGen.cpp @@ -250,7 +250,7 @@ void MatcherGen::EmitLeafMatchCode(const TreePatternNode *N) { // If we have a physreg reference like (mul gpr:$src, EAX) then we need to // record the register if (LeafRec->isSubClassOf("Register")) { - AddMatcher(new RecordMatcher("physreg input "+LeafRec->getName(), + AddMatcher(new RecordMatcher("physreg input "+LeafRec->getName().str(), NextRecordedOperandNo)); PhysRegInputs.push_back(std::make_pair(LeafRec, NextRecordedOperandNo++)); return; @@ -354,7 +354,7 @@ void MatcherGen::EmitOperatorMatchCode(const TreePatternNode *N, unsigned OpNo = 0; if (N->NodeHasProperty(SDNPHasChain, CGP)) { // Record the node and remember it in our chained nodes list. - AddMatcher(new RecordMatcher("'" + N->getOperator()->getName() + + AddMatcher(new RecordMatcher("'" + N->getOperator()->getName().str() + "' chained node", NextRecordedOperandNo)); // Remember all of the input chains our pattern will match. @@ -418,7 +418,7 @@ void MatcherGen::EmitOperatorMatchCode(const TreePatternNode *N, // TODO: This redundantly records nodes with both glues and chains. // Record the node and remember it in our chained nodes list. - AddMatcher(new RecordMatcher("'" + N->getOperator()->getName() + + AddMatcher(new RecordMatcher("'" + N->getOperator()->getName().str() + "' glue output node", NextRecordedOperandNo)); } @@ -887,7 +887,7 @@ EmitResultInstructionAsOperand(const TreePatternNode *N, assert((!ResultVTs.empty() || TreeHasOutGlue || NodeHasChain) && "Node has no result"); - AddMatcher(new EmitNodeMatcher(II.Namespace+"::"+II.TheDef->getName(), + AddMatcher(new EmitNodeMatcher(II.Namespace+"::"+II.TheDef->getName().str(), ResultVTs, InstOps, NodeHasChain, TreeHasInGlue, TreeHasOutGlue, NodeHasMemRefs, NumFixedArityOperands, diff --git a/llvm/utils/TableGen/DisassemblerEmitter.cpp b/llvm/utils/TableGen/DisassemblerEmitter.cpp index 44815b05f27..6e1d8dde981 100644 --- a/llvm/utils/TableGen/DisassemblerEmitter.cpp +++ b/llvm/utils/TableGen/DisassemblerEmitter.cpp @@ -104,7 +104,7 @@ extern void EmitFixedLenDecoder(RecordKeeper &RK, raw_ostream &OS, void EmitDisassembler(RecordKeeper &Records, raw_ostream &OS) { CodeGenTarget Target(Records); - emitSourceFileHeader(" * " + Target.getName() + " Disassembler", OS); + emitSourceFileHeader(" * " + Target.getName().str() + " Disassembler", OS); // X86 uses a custom disassembler. if (Target.getName() == "X86") { diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp index 30a57b502bf..43c6a982633 100644 --- a/llvm/utils/TableGen/FastISelEmitter.cpp +++ b/llvm/utils/TableGen/FastISelEmitter.cpp @@ -873,7 +873,7 @@ void EmitFastISel(RecordKeeper &RK, raw_ostream &OS) { CodeGenDAGPatterns CGP(RK); const CodeGenTarget &Target = CGP.getTargetInfo(); emitSourceFileHeader("\"Fast\" Instruction Selector for the " + - Target.getName() + " target", OS); + Target.getName().str() + " target", OS); // Determine the target's namespace name. std::string InstNS = Target.getInstNamespace() + "::"; diff --git a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp index a20b469cd84..010f415edb9 100644 --- a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp +++ b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp @@ -400,7 +400,7 @@ protected: } // Returns the record name. - const std::string &nameWithID(unsigned Opcode) const { + const StringRef nameWithID(unsigned Opcode) const { return AllInstructions[Opcode]->TheDef->getName(); } @@ -1720,7 +1720,7 @@ static std::string findOperandDecoderMethod(TypedInit *TI) { TypeRecord = TypeRecord->getValueAsDef("RegClass"); if (TypeRecord->isSubClassOf("RegisterClass")) { - Decoder = "Decode" + TypeRecord->getName() + "RegisterClass"; + Decoder = "Decode" + TypeRecord->getName().str() + "RegisterClass"; } else if (TypeRecord->isSubClassOf("PointerLikeRegClass")) { Decoder = "DecodePointerLikeRegClass" + utostr(TypeRecord->getValueAsInt("RegClassKind")); @@ -1889,7 +1889,7 @@ static bool populateInstruction(CodeGenTarget &Target, if (TypeRecord->isSubClassOf("RegisterOperand")) TypeRecord = TypeRecord->getValueAsDef("RegClass"); if (TypeRecord->isSubClassOf("RegisterClass")) { - Decoder = "Decode" + TypeRecord->getName() + "RegisterClass"; + Decoder = "Decode" + TypeRecord->getName().str() + "RegisterClass"; isReg = true; } else if (TypeRecord->isSubClassOf("PointerLikeRegClass")) { Decoder = "DecodePointerLikeRegClass" + diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp index e9c448d0445..a7abf61ac28 100644 --- a/llvm/utils/TableGen/InstrInfoEmitter.cpp +++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp @@ -217,7 +217,8 @@ void InstrInfoEmitter::initOperandMapData( } OpList[I->second] = Info.MIOperandNo; } - OperandMap[OpList].push_back(Namespace + "::" + Inst->TheDef->getName()); + OperandMap[OpList].push_back(Namespace + "::" + + Inst->TheDef->getName().str()); } } diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp index 83b2bf8a522..6d9324a7e77 100644 --- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp +++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp @@ -1361,7 +1361,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, OS << "};\n"; // End of register descriptors... - std::string ClassName = Target.getName() + "GenRegisterInfo"; + std::string ClassName = Target.getName().str() + "GenRegisterInfo"; auto SubRegIndicesSize = std::distance(SubRegIndices.begin(), SubRegIndices.end()); diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp index c02e98af7ea..e56fbcf63c3 100644 --- a/llvm/utils/TableGen/SubtargetEmitter.cpp +++ b/llvm/utils/TableGen/SubtargetEmitter.cpp @@ -294,7 +294,7 @@ void SubtargetEmitter::FormItineraryStageString(const std::string &Name, // For each unit for (unsigned j = 0, M = UnitList.size(); j < M;) { // Add name and bitwise or - ItinString += Name + "FU::" + UnitList[j]->getName(); + ItinString += Name + "FU::" + UnitList[j]->getName().str(); if (++j < M) ItinString += " | "; } @@ -341,7 +341,7 @@ void SubtargetEmitter::FormItineraryBypassString(const std::string &Name, unsigned N = BypassList.size(); unsigned i = 0; for (; i < N;) { - ItinString += Name + "Bypass::" + BypassList[i]->getName(); + ItinString += Name + "Bypass::" + BypassList[i]->getName().str(); if (++i < NOperandCycles) ItinString += ", "; } for (; i < NOperandCycles;) { diff --git a/llvm/utils/TableGen/SubtargetFeatureInfo.h b/llvm/utils/TableGen/SubtargetFeatureInfo.h index b8d9123b845..99f380f2a1d 100644 --- a/llvm/utils/TableGen/SubtargetFeatureInfo.h +++ b/llvm/utils/TableGen/SubtargetFeatureInfo.h @@ -33,7 +33,9 @@ struct SubtargetFeatureInfo { SubtargetFeatureInfo(Record *D, uint64_t Idx) : TheDef(D), Index(Idx) {} /// \brief The name of the enumerated constant identifying this feature. - std::string getEnumName() const { return "Feature_" + TheDef->getName(); } + std::string getEnumName() const { + return "Feature_" + TheDef->getName().str(); + } void dump() const; static std::vector<std::pair<Record *, SubtargetFeatureInfo>> |
