diff options
| -rw-r--r-- | clang/test/CodeGen/x86_64-mno-sse2.c | 20 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 |
2 files changed, 24 insertions, 0 deletions
diff --git a/clang/test/CodeGen/x86_64-mno-sse2.c b/clang/test/CodeGen/x86_64-mno-sse2.c new file mode 100644 index 00000000000..0c8e78edb99 --- /dev/null +++ b/clang/test/CodeGen/x86_64-mno-sse2.c @@ -0,0 +1,20 @@ +// RUN: %clang_cc1 -triple x86_64-linux -target-feature -sse2 -S -o /dev/null -verify %s +// REQUIRES: x86-registered-target + +double f1(void) { // expected-error {{SSE2 register return with SSE2 disabled}} + return 1.4; +} +extern double g; +void f2(void) { // expected-error {{SSE2 register return with SSE2 disabled}} + g = f1(); +} +void take_double(double); +void pass_double(void) { + // FIXME: Still asserts. + //take_double(1.5); +} + +double return_double(); +void call_double(double *a) { // expected-error {{SSE2 register return with SSE2 disabled}} + *a = return_double(); +} diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 9c16c173523..f40e29b3cd4 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -2900,6 +2900,10 @@ SDValue X86TargetLowering::LowerCallResult( ((Is64Bit || Ins[InsIndex].Flags.isInReg()) && !Subtarget.hasSSE1())) { errorUnsupported(DAG, dl, "SSE register return with SSE disabled"); VA.convertToReg(X86::FP0); // Set reg to FP0, avoid hitting asserts. + } else if (CopyVT == MVT::f64 && + (Is64Bit && !Subtarget.hasSSE2())) { + errorUnsupported(DAG, dl, "SSE2 register return with SSE2 disabled"); + VA.convertToReg(X86::FP0); // Set reg to FP0, avoid hitting asserts. } // If we prefer to use the value in xmm registers, copy it out as f80 and |
