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-rw-r--r--llvm/lib/Target/Mips/MipsInstrInfo.td8
-rw-r--r--llvm/test/MC/Mips/mips1/valid.s17
-rw-r--r--llvm/test/MC/Mips/mips2/valid.s17
-rw-r--r--llvm/test/MC/Mips/mips3/valid.s40
-rw-r--r--llvm/test/MC/Mips/mips32/invalid-mips32r2.s4
-rw-r--r--llvm/test/MC/Mips/mips32/valid.s17
-rw-r--r--llvm/test/MC/Mips/mips32r2/valid.s21
-rw-r--r--llvm/test/MC/Mips/mips4/valid.s40
-rw-r--r--llvm/test/MC/Mips/mips5/valid.s38
-rw-r--r--llvm/test/MC/Mips/mips64/invalid-mips64r2.s6
-rw-r--r--llvm/test/MC/Mips/mips64/valid.s38
-rw-r--r--llvm/test/MC/Mips/mips64r2/valid.s48
12 files changed, 240 insertions, 54 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td
index 6e6c0da002c..acc1946a4c2 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.td
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.td
@@ -487,14 +487,18 @@ class shift_rotate_imm<string opstr, Operand ImmOpnd,
SDPatternOperator PF = null_frag> :
InstSE<(outs RO:$rd), (ins RO:$rt, ImmOpnd:$shamt),
!strconcat(opstr, "\t$rd, $rt, $shamt"),
- [(set RO:$rd, (OpNode RO:$rt, PF:$shamt))], itin, FrmR, opstr>;
+ [(set RO:$rd, (OpNode RO:$rt, PF:$shamt))], itin, FrmR, opstr> {
+ let TwoOperandAliasConstraint = "$rt = $rd";
+}
class shift_rotate_reg<string opstr, RegisterOperand RO, InstrItinClass itin,
SDPatternOperator OpNode = null_frag>:
InstSE<(outs RO:$rd), (ins RO:$rt, GPR32Opnd:$rs),
!strconcat(opstr, "\t$rd, $rt, $rs"),
[(set RO:$rd, (OpNode RO:$rt, GPR32Opnd:$rs))], itin, FrmR,
- opstr>;
+ opstr> {
+ let TwoOperandAliasConstraint = "$rt = $rd";
+}
// Load Upper Imediate
class LoadUpper<string opstr, RegisterOperand RO, Operand Imm>:
diff --git a/llvm/test/MC/Mips/mips1/valid.s b/llvm/test/MC/Mips/mips1/valid.s
index 7fc866a621c..fca3c5eb9e5 100644
--- a/llvm/test/MC/Mips/mips1/valid.s
+++ b/llvm/test/MC/Mips/mips1/valid.s
@@ -65,14 +65,23 @@
or $t4,$s0,$sp
sb $s6,-19857($t6)
sh $t6,-6704($t7)
- sllv $a3,$zero,$t1
+ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80]
+ sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80]
+ sllv $a3,$t1 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04]
+ sllv $a3,$zero,$t1 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
- srav $s1,$s7,$sp
- srlv $t9,$s4,$a0
- ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
+ sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]
+ sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
+ srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07]
+ srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
+ srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06]
+ srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
diff --git a/llvm/test/MC/Mips/mips2/valid.s b/llvm/test/MC/Mips/mips2/valid.s
index 1a050407424..954ecfe4744 100644
--- a/llvm/test/MC/Mips/mips2/valid.s
+++ b/llvm/test/MC/Mips/mips2/valid.s
@@ -77,16 +77,25 @@
sdc1 $f31,30574($t5)
sdc2 $20,23157($s2)
sh $t6,-6704($t7)
- sllv $a3,$zero,$t1
+ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80]
+ sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80]
+ sllv $a3,$t1 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04]
+ sllv $a3,$zero,$t1 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
- srav $s1,$s7,$sp
- srlv $t9,$s4,$a0
- ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
+ sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]
+ sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
+ srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07]
+ srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
+ srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06]
+ srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
diff --git a/llvm/test/MC/Mips/mips3/valid.s b/llvm/test/MC/Mips/mips3/valid.s
index baa9b7354cc..4232474e125 100644
--- a/llvm/test/MC/Mips/mips3/valid.s
+++ b/llvm/test/MC/Mips/mips3/valid.s
@@ -45,12 +45,27 @@
dmtc1 $s0,$f14
dmult $s7,$t1
dmultu $a1,$a2
- dsllv $zero,$s4,$t4
- dsrav $gp,$s2,$s3
- dsrlv $s3,$t6,$s4
+ dsll $zero,18 # CHECK: dsll $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xb8]
+ dsll $zero,$s4,18 # CHECK: dsll $zero, $20, 18 # encoding: [0x00,0x14,0x04,0xb8]
+ dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc]
+ dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc]
+ dsllv $zero,$t4 # CHECK: dsllv $zero, $zero, $12 # encoding: [0x01,0x80,0x00,0x14]
+ dsllv $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14]
+ dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb]
+ dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb]
+ dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbf]
+ dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbf]
+ dsrav $gp,$s3 # CHECK: dsrav $gp, $gp, $19 # encoding: [0x02,0x7c,0xe0,0x17]
+ dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
+ dsrl $s3,23 # CHECK: dsrl $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfa]
+ dsrl $s3,$6,23 # CHECK: dsrl $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfa]
+ dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfe]
+ dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfe]
+ dsrlv $s3,$s4 # CHECK: dsrlv $19, $19, $20 # encoding: [0x02,0x93,0x98,0x16]
+ dsrlv $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16]
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
- ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
+ ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
eret
floor.l.d $f26,$f7
floor.l.s $f12,$f5
@@ -113,16 +128,25 @@
sdl $a3,-20961($s8)
sdr $t3,-20423($t4)
sh $t6,-6704($t7)
- sllv $a3,$zero,$t1
+ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80]
+ sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80]
+ sllv $a3,$9 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04]
+ sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
- srav $s1,$s7,$sp
- srlv $t9,$s4,$a0
- ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
+ sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]
+ sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
+ srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07]
+ srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
+ srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06]
+ srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
diff --git a/llvm/test/MC/Mips/mips32/invalid-mips32r2.s b/llvm/test/MC/Mips/mips32/invalid-mips32r2.s
index 881f7f11e75..5cb8c659bfd 100644
--- a/llvm/test/MC/Mips/mips32/invalid-mips32r2.s
+++ b/llvm/test/MC/Mips/mips32/invalid-mips32r2.s
@@ -16,6 +16,10 @@
nmsub.d $f30,$f8,$f16,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
pause # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ rotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ rotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ rotrv $1,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ rotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
sdxc1 $f11,$t2($t6) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
seb $t9,$t7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
seh $v1,$t4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
diff --git a/llvm/test/MC/Mips/mips32/valid.s b/llvm/test/MC/Mips/mips32/valid.s
index 9e83c0f164b..3eaeb8548ae 100644
--- a/llvm/test/MC/Mips/mips32/valid.s
+++ b/llvm/test/MC/Mips/mips32/valid.s
@@ -101,16 +101,25 @@
sdc1 $f31,30574($t5)
sdc2 $20,23157($s2)
sh $t6,-6704($t7)
- sllv $a3,$zero,$t1
+ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80]
+ sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80]
+ sllv $a3,$t1 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04]
+ sllv $a3,$zero,$t1 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
- srav $s1,$s7,$sp
- srlv $t9,$s4,$a0
- ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
+ sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]
+ sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
+ srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07]
+ srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
+ srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06]
+ srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
diff --git a/llvm/test/MC/Mips/mips32r2/valid.s b/llvm/test/MC/Mips/mips32r2/valid.s
index 3e9a1d37452..078d9f54361 100644
--- a/llvm/test/MC/Mips/mips32r2/valid.s
+++ b/llvm/test/MC/Mips/mips32r2/valid.s
@@ -113,6 +113,10 @@
or $t4,$s0,$sp
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
rdhwr $sp,$11
+ rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
+ rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
+ rotrv $1,$15 # CHECK: rotrv $1, $1, $15 # encoding: [0x01,0xe1,0x08,0x46]
+ rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
round.w.d $f6,$f4
round.w.s $f27,$f28
sb $s6,-19857($t6)
@@ -123,16 +127,25 @@
seb $t9,$t7
seh $v1,$t4
sh $t6,-6704($t7)
- sllv $a3,$zero,$t1
+ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80]
+ sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80]
+ sllv $a3,$t1 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04]
+ sllv $a3,$zero,$t1 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
- srav $s1,$s7,$sp
- srlv $t9,$s4,$a0
- ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
+ sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]
+ sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
+ srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07]
+ srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
+ srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06]
+ srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
diff --git a/llvm/test/MC/Mips/mips4/valid.s b/llvm/test/MC/Mips/mips4/valid.s
index a3d1759e8ec..e13506ecdd1 100644
--- a/llvm/test/MC/Mips/mips4/valid.s
+++ b/llvm/test/MC/Mips/mips4/valid.s
@@ -44,9 +44,26 @@
dmtc1 $s0,$f14
dmult $s7,$t1
dmultu $a1,$a2
- dsllv $zero,$s4,$t4
- dsrav $gp,$s2,$s3
- dsrlv $s3,$t6,$s4
+ dsll $zero,18 # CHECK: dsll $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xb8]
+ dsll $zero,$s4,18 # CHECK: dsll $zero, $20, 18 # encoding: [0x00,0x14,0x04,0xb8]
+ dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc]
+ dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc]
+ dsllv $zero,$t4 # CHECK: dsllv $zero, $zero, $12 # encoding: [0x01,0x80,0x00,0x14]
+ dsllv $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14]
+ dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb]
+ dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb]
+ dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbf]
+ dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbf]
+ dsrav $gp,$s3 # CHECK: dsrav $gp, $gp, $19 # encoding: [0x02,0x7c,0xe0,0x17]
+ dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
+ dsrl $s3,23 # CHECK: dsrl $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfa]
+ dsrl $s3,$6,23 # CHECK: dsrl $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfa]
+ dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfe]
+ dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfe]
+ dsrlv $s3,$s4 # CHECK: dsrlv $19, $19, $20 # encoding: [0x02,0x93,0x98,0x16]
+ dsrlv $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16]
+ dsub $a3,$s6,$t0
+ dsubu $a1,$a1,$k0
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
@@ -127,16 +144,25 @@
sdr $t3,-20423($t4)
sdxc1 $f11,$t2($t6)
sh $t6,-6704($t7)
- sllv $a3,$zero,$t1
+ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80]
+ sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80]
+ sllv $a3,$9 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04]
+ sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
- srav $s1,$s7,$sp
- srlv $t9,$s4,$a0
- ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
+ sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]
+ sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
+ srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07]
+ srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
+ srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06]
+ srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
diff --git a/llvm/test/MC/Mips/mips5/valid.s b/llvm/test/MC/Mips/mips5/valid.s
index ebe2f703b12..2a0f98d9493 100644
--- a/llvm/test/MC/Mips/mips5/valid.s
+++ b/llvm/test/MC/Mips/mips5/valid.s
@@ -45,9 +45,24 @@
dmtc1 $s0,$f14
dmult $s7,$t1
dmultu $a1,$a2
- dsllv $zero,$s4,$t4
- dsrav $gp,$s2,$s3
- dsrlv $s3,$t6,$s4
+ dsll $zero,18 # CHECK: dsll $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xb8]
+ dsll $zero,$s4,18 # CHECK: dsll $zero, $20, 18 # encoding: [0x00,0x14,0x04,0xb8]
+ dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc]
+ dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc]
+ dsllv $zero,$t4 # CHECK: dsllv $zero, $zero, $12 # encoding: [0x01,0x80,0x00,0x14]
+ dsllv $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14]
+ dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb]
+ dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb]
+ dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbf]
+ dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbf]
+ dsrav $gp,$s3 # CHECK: dsrav $gp, $gp, $19 # encoding: [0x02,0x7c,0xe0,0x17]
+ dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
+ dsrl $s3,23 # CHECK: dsrl $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfa]
+ dsrl $s3,$6,23 # CHECK: dsrl $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfa]
+ dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfe]
+ dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfe]
+ dsrlv $s3,$s4 # CHECK: dsrlv $19, $19, $20 # encoding: [0x02,0x93,0x98,0x16]
+ dsrlv $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16]
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
@@ -129,16 +144,25 @@
sdr $t3,-20423($t4)
sdxc1 $f11,$t2($t6)
sh $t6,-6704($t7)
- sllv $a3,$zero,$t1
+ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80]
+ sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80]
+ sllv $a3,$9 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04]
+ sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
- srav $s1,$s7,$sp
- srlv $t9,$s4,$a0
- ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
+ sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]
+ sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
+ srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07]
+ srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
+ srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06]
+ srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
diff --git a/llvm/test/MC/Mips/mips64/invalid-mips64r2.s b/llvm/test/MC/Mips/mips64/invalid-mips64r2.s
index 41aa8ae4798..c343a8dd837 100644
--- a/llvm/test/MC/Mips/mips64/invalid-mips64r2.s
+++ b/llvm/test/MC/Mips/mips64/invalid-mips64r2.s
@@ -5,6 +5,12 @@
# RUN: FileCheck %s < %t1
.set noat
+ drotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ drotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ drotr32 $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ drotr32 $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ drotrv $1,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
+ drotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
dshd $v0,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
diff --git a/llvm/test/MC/Mips/mips64/valid.s b/llvm/test/MC/Mips/mips64/valid.s
index 9ccb2ffc1f8..6446d18304e 100644
--- a/llvm/test/MC/Mips/mips64/valid.s
+++ b/llvm/test/MC/Mips/mips64/valid.s
@@ -49,9 +49,24 @@
dmtc1 $s0,$f14
dmult $s7,$t1
dmultu $a1,$a2
- dsllv $zero,$s4,$t4
- dsrav $gp,$s2,$s3
- dsrlv $s3,$t6,$s4
+ dsll $zero,18 # CHECK: dsll $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xb8]
+ dsll $zero,$s4,18 # CHECK: dsll $zero, $20, 18 # encoding: [0x00,0x14,0x04,0xb8]
+ dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc]
+ dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc]
+ dsllv $zero,$t4 # CHECK: dsllv $zero, $zero, $12 # encoding: [0x01,0x80,0x00,0x14]
+ dsllv $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14]
+ dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb]
+ dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb]
+ dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbf]
+ dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbf]
+ dsrav $gp,$s3 # CHECK: dsrav $gp, $gp, $19 # encoding: [0x02,0x7c,0xe0,0x17]
+ dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
+ dsrl $s3,23 # CHECK: dsrl $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfa]
+ dsrl $s3,$6,23 # CHECK: dsrl $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfa]
+ dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfe]
+ dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfe]
+ dsrlv $s3,$s4 # CHECK: dsrlv $19, $19, $20 # encoding: [0x02,0x93,0x98,0x16]
+ dsrlv $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16]
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
@@ -142,16 +157,25 @@
sdr $t3,-20423($t4)
sdxc1 $f11,$t2($t6)
sh $t6,-6704($t7)
- sllv $a3,$zero,$t1
+ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80]
+ sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80]
+ sllv $a3,$9 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04]
+ sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
- srav $s1,$s7,$sp
- srlv $t9,$s4,$a0
- ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
+ sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]
+ sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
+ srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07]
+ srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
+ srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06]
+ srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
diff --git a/llvm/test/MC/Mips/mips64r2/valid.s b/llvm/test/MC/Mips/mips64r2/valid.s
index 826a6b2e60b..97aa9aad72c 100644
--- a/llvm/test/MC/Mips/mips64r2/valid.s
+++ b/llvm/test/MC/Mips/mips64r2/valid.s
@@ -50,11 +50,32 @@
dmtc1 $s0,$f14
dmult $s7,$t1
dmultu $a1,$a2
+ drotr $1,15 # CHECK: drotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xfa]
+ drotr $1,$14,15 # CHECK: drotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xfa]
+ drotr32 $1,15 # CHECK: drotr32 $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xfe]
+ drotr32 $1,$14,15 # CHECK: drotr32 $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xfe]
+ drotrv $1,$15 # CHECK: drotrv $1, $1, $15 # encoding: [0x01,0xe1,0x08,0x56]
+ drotrv $1,$14,$15 # CHECK: drotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x56]
dsbh $v1,$t6
dshd $v0,$sp
- dsllv $zero,$s4,$t4
- dsrav $gp,$s2,$s3
- dsrlv $s3,$t6,$s4
+ dsll $zero,18 # CHECK: dsll $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xb8]
+ dsll $zero,$s4,18 # CHECK: dsll $zero, $20, 18 # encoding: [0x00,0x14,0x04,0xb8]
+ dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc]
+ dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0xbc]
+ dsllv $zero,$t4 # CHECK: dsllv $zero, $zero, $12 # encoding: [0x01,0x80,0x00,0x14]
+ dsllv $zero,$s4,$t4 # CHECK: dsllv $zero, $20, $12 # encoding: [0x01,0x94,0x00,0x14]
+ dsra $gp,10 # CHECK: dsra $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbb]
+ dsra $gp,$s2,10 # CHECK: dsra $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbb]
+ dsra32 $gp,10 # CHECK: dsra32 $gp, $gp, 10 # encoding: [0x00,0x1c,0xe2,0xbf]
+ dsra32 $gp,$s2,10 # CHECK: dsra32 $gp, $18, 10 # encoding: [0x00,0x12,0xe2,0xbf]
+ dsrav $gp,$s3 # CHECK: dsrav $gp, $gp, $19 # encoding: [0x02,0x7c,0xe0,0x17]
+ dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
+ dsrl $s3,23 # CHECK: dsrl $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfa]
+ dsrl $s3,$6,23 # CHECK: dsrl $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfa]
+ dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0xfe]
+ dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0xfe]
+ dsrlv $s3,$s4 # CHECK: dsrlv $19, $19, $20 # encoding: [0x02,0x93,0x98,0x16]
+ dsrlv $s3,$6,$s4 # CHECK: dsrlv $19, $6, $20 # encoding: [0x02,0x86,0x98,0x16]
dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
@@ -140,6 +161,10 @@
or $t4,$s0,$sp
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
rdhwr $sp,$11
+ rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
+ rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
+ rotrv $1,$15 # CHECK: rotrv $1, $1, $15 # encoding: [0x01,0xe1,0x08,0x46]
+ rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
round.l.d $f12,$f1
round.l.s $f25,$f5
round.w.d $f6,$f4
@@ -156,16 +181,25 @@
seb $t9,$t7
seh $v1,$t4
sh $t6,-6704($t7)
- sllv $a3,$zero,$t1
+ sll $a3,18 # CHECK: sll $7, $7, 18 # encoding: [0x00,0x07,0x3c,0x80]
+ sll $a3,$zero,18 # CHECK: sll $7, $zero, 18 # encoding: [0x00,0x00,0x3c,0x80]
+ sllv $a3,$9 # CHECK: sllv $7, $7, $9 # encoding: [0x01,0x27,0x38,0x04]
+ sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
slt $s7,$t3,$k1
slti $s1,$t2,9489
sltiu $t9,$t9,-15531
sltu $s4,$s5,$t3
sqrt.d $f17,$f22
sqrt.s $f0,$f1
- srav $s1,$s7,$sp
- srlv $t9,$s4,$a0
- ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
+ sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]
+ sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
+ srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07]
+ srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
+ srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
+ srlv $t9,$a0 # CHECK: srlv $25, $25, $4 # encoding: [0x00,0x99,0xc8,0x06]
+ srlv $t9,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
+ ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4
sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22
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