diff options
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.h | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/bics.ll | 8 |
2 files changed, 7 insertions, 6 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h index 7867d7c2b42..054ccc31674 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h @@ -412,6 +412,11 @@ public: return true; } + bool hasAndNotCompare(SDValue) const override { + // 'bics' + return true; + } + bool hasBitPreservingFPLogic(EVT VT) const override { // FIXME: Is this always true? It should be true for vectors at least. return VT == MVT::f32 || VT == MVT::f64; diff --git a/llvm/test/CodeGen/AArch64/bics.ll b/llvm/test/CodeGen/AArch64/bics.ll index 1c0c0793d36..53aa28ad913 100644 --- a/llvm/test/CodeGen/AArch64/bics.ll +++ b/llvm/test/CodeGen/AArch64/bics.ll @@ -13,13 +13,10 @@ define i1 @andn_cmp(i32 %x, i32 %y) { ret i1 %cmp } -; FIXME: Recognize a disguised bics. - define i1 @and_cmp(i32 %x, i32 %y) { ; CHECK-LABEL: and_cmp: ; CHECK: // BB#0: -; CHECK-NEXT: and w8, w0, w1 -; CHECK-NEXT: cmp w8, w1 +; CHECK-NEXT: bics wzr, w1, w0 ; CHECK-NEXT: cset w0, eq ; CHECK-NEXT: ret ; @@ -32,8 +29,7 @@ define i1 @and_cmp_const(i32 %x) { ; CHECK-LABEL: and_cmp_const: ; CHECK: // BB#0: ; CHECK-NEXT: mov w8, #43 -; CHECK-NEXT: and w8, w0, w8 -; CHECK-NEXT: cmp w8, #43 +; CHECK-NEXT: bics wzr, w8, w0 ; CHECK-NEXT: cset w0, eq ; CHECK-NEXT: ret ; |
