diff options
| -rw-r--r-- | llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 14 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 26 | ||||
| -rw-r--r-- | llvm/test/MC/AsmParser/X86/x86_32-new-encoder.s | 11 | ||||
| -rw-r--r-- | llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s | 11 | ||||
| -rw-r--r-- | llvm/test/MC/MachO/jcc.s | 2 | 
5 files changed, 45 insertions, 19 deletions
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp index 1950c1da195..cddf8ebfc07 100644 --- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -615,15 +615,6 @@ X86Operand *X86ATTAsmParser::ParseMemOperand(unsigned SegReg, SMLoc MemStart) {  bool X86ATTAsmParser::  ParseInstruction(StringRef Name, SMLoc NameLoc,                   SmallVectorImpl<MCParsedAsmOperand*> &Operands) { - -  // The "Jump if rCX Zero" form jcxz is not allowed in 64-bit mode and -  // the form jrcxz is not allowed in 32-bit mode. -  if (Is64Bit) { -    // FIXME: We can do jcxz/jecxz, we just don't have the encoding right yet. -    if (Name == "jcxz" || Name == "jecxz") -      return Error(NameLoc, Name + " cannot be encoded in 64-bit mode"); -  } -    // FIXME: Hack to recognize "sal..." and "rep..." for now. We need a way to    // represent alternative syntaxes in the .td file, without requiring    // instruction duplication. @@ -646,11 +637,6 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,      .Case("jz", "je")      .Case("jnz", "jne")      .Case("jc", "jb") -    // FIXME: in 32-bit mode jcxz requires an AdSize prefix. In 64-bit mode -    // jecxz requires an AdSize prefix but jecxz does not have a prefix in -    // 32-bit mode. -    .Case("jecxz", "jcxz") -    .Case("jrcxz", Is64Bit ? "jcxz" : "jrcxz")      .Case("jna", "jbe")      .Case("jnae", "jb")      .Case("jnb", "jae") diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 965ddb2871e..58a7e2464c5 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -664,10 +664,28 @@ defm JGE : ICBr<0x7D, 0x8D, "jge\t$dst", X86_COND_GE>;  defm JLE : ICBr<0x7E, 0x8E, "jle\t$dst", X86_COND_LE>;  defm JG  : ICBr<0x7F, 0x8F, "jg\t$dst" , X86_COND_G>; -// FIXME: What about the CX/RCX versions of this instruction? -let Uses = [ECX], isBranch = 1, isTerminator = 1 in -  def JCXZ8 : Ii8PCRel<0xE3, RawFrm, (outs), (ins brtarget8:$dst), -                       "jcxz\t$dst", []>; +// jcx/jecx/jrcx instructions. +let isAsmParserOnly = 1, isBranch = 1, isTerminator = 1 in { +  // These are the 32-bit versions of this instruction for the asmparser.  In +  // 32-bit mode, the address size prefix is jcxz and the unprefixed version is +  // jecxz. +  let Uses = [CX] in +    def JCXZ : Ii8PCRel<0xE3, RawFrm, (outs), (ins brtarget8:$dst), +                        "jcxz\t$dst", []>, AdSize, Requires<[In32BitMode]>; +  let Uses = [ECX] in +    def JECXZ_32 : Ii8PCRel<0xE3, RawFrm, (outs), (ins brtarget8:$dst), +                           "jecxz\t$dst", []>, Requires<[In32BitMode]>; + +  // J*CXZ instruction: 64-bit versions of this instruction for the asmparser. +  // In 64-bit mode, the address size prefix is jecxz and the unprefixed version +  // is jrcxz. +  let Uses = [ECX] in +    def JECXZ_64 : Ii8PCRel<0xE3, RawFrm, (outs), (ins brtarget8:$dst), +                            "jecxz\t$dst", []>, AdSize, Requires<[In64BitMode]>; +  let Uses = [RCX] in +    def JRCXZ : Ii8PCRel<0xE3, RawFrm, (outs), (ins brtarget8:$dst), +                           "jrcxz\t$dst", []>, Requires<[In64BitMode]>; +}  // Indirect branches diff --git a/llvm/test/MC/AsmParser/X86/x86_32-new-encoder.s b/llvm/test/MC/AsmParser/X86/x86_32-new-encoder.s index e3aa1887ef8..e4674b7b980 100644 --- a/llvm/test/MC/AsmParser/X86/x86_32-new-encoder.s +++ b/llvm/test/MC/AsmParser/X86/x86_32-new-encoder.s @@ -423,3 +423,14 @@ retl  // CHECK: lcalll $2, $4660  // CHECK:   encoding: [0x9a,0x34,0x12,0x00,0x00,0x02,0x00]  lcalll $0x2, $0x1234 + + +// rdar://8061602 +L1: +  jcxz L1 +// CHECK: jcxz L1 +// CHECK:   encoding: [0x67,0xe3,A] +  jecxz L1 +// CHECK: jecxz L1 +// CHECK:   encoding: [0xe3,A] + diff --git a/llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s b/llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s index 9f94d8404f4..3644147b167 100644 --- a/llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s +++ b/llvm/test/MC/AsmParser/X86/x86_64-new-encoder.s @@ -157,3 +157,14 @@ btq $0x01,%rdx  // CHECK: btq $61, -216(%rbp)  // CHECK:   encoding: [0x48,0x0f,0xba,0xa5,0x28,0xff,0xff,0xff,0x3d]  	btq	$61, -216(%rbp) + + +// rdar://8061602 +L1: +  jecxz L1 +// CHECK: jecxz L1 +// CHECK:   encoding: [0x67,0xe3,A] +  jrcxz L1 +// CHECK: jrcxz L1 +// CHECK:   encoding: [0xe3,A] + diff --git a/llvm/test/MC/MachO/jcc.s b/llvm/test/MC/MachO/jcc.s index 7640429a79d..9ed46b111a4 100644 --- a/llvm/test/MC/MachO/jcc.s +++ b/llvm/test/MC/MachO/jcc.s @@ -10,7 +10,7 @@  1: nop     jc 1f  1: nop -   jcxz 1f +   jecxz 1f  1: nop     jecxz 1f  1: nop  | 

