diff options
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrVFP.td | 17 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/softfp-fabs-fneg.ll | 41 |
2 files changed, 57 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrVFP.td b/llvm/lib/Target/ARM/ARMInstrVFP.td index 3a65390937a..eef5634d821 100644 --- a/llvm/lib/Target/ARM/ARMInstrVFP.td +++ b/llvm/lib/Target/ARM/ARMInstrVFP.td @@ -20,7 +20,6 @@ def arm_cmpfp : SDNode<"ARMISD::CMPFP", SDT_ARMCmp, [SDNPOutGlue]>; def arm_cmpfp0 : SDNode<"ARMISD::CMPFPw0", SDT_CMPFP0, [SDNPOutGlue]>; def arm_fmdrr : SDNode<"ARMISD::VMOVDRR", SDT_VMOVDRR>; - //===----------------------------------------------------------------------===// // Operand Definitions. // @@ -922,6 +921,22 @@ def VMOVDRR : AVConv5I<0b11000100, 0b1011, let isRegSequence = 1; } +// Hoist an fabs or a fneg of a value coming from integer registers +// and do the fabs/fneg on the integer value. This is never a lose +// and could enable the conversion to float to be removed completely. +def : Pat<(fabs (arm_fmdrr GPR:$Rl, GPR:$Rh)), + (VMOVDRR GPR:$Rl, (BFC GPR:$Rh, (i32 0x7FFFFFFF)))>, + Requires<[IsARM]>; +def : Pat<(fabs (arm_fmdrr GPR:$Rl, GPR:$Rh)), + (VMOVDRR GPR:$Rl, (t2BFC GPR:$Rh, (i32 0x7FFFFFFF)))>, + Requires<[IsThumb2]>; +def : Pat<(fneg (arm_fmdrr GPR:$Rl, GPR:$Rh)), + (VMOVDRR GPR:$Rl, (EORri GPR:$Rh, (i32 0x80000000)))>, + Requires<[IsARM]>; +def : Pat<(fneg (arm_fmdrr GPR:$Rl, GPR:$Rh)), + (VMOVDRR GPR:$Rl, (t2EORri GPR:$Rh, (i32 0x80000000)))>, + Requires<[IsThumb2]>; + let hasSideEffects = 0 in def VMOVSRR : AVConv5I<0b11000100, 0b1010, (outs SPR:$dst1, SPR:$dst2), (ins GPR:$src1, GPR:$src2), diff --git a/llvm/test/CodeGen/ARM/softfp-fabs-fneg.ll b/llvm/test/CodeGen/ARM/softfp-fabs-fneg.ll new file mode 100644 index 00000000000..b608fb84021 --- /dev/null +++ b/llvm/test/CodeGen/ARM/softfp-fabs-fneg.ll @@ -0,0 +1,41 @@ +; RUN: llc -mtriple=armv7 < %s | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK +; RUN: llc -mtriple=thumbv7 < %s | FileCheck %s --check-prefix=CHECK-THUMB --check-prefix=CHECK + +target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" +target triple = "armv7--" + +define double @f(double %a) { + ; CHECK-LABEL: f: + ; CHECK: bfc r1, #31, #1 + ; CHECK-NEXT: bx lr + %x = call double @llvm.fabs.f64(double %a) readnone + ret double %x +} + +define float @g(float %a) { + ; CHECK-LABEL: g: + ; CHECK-THUMB: bic r0, r0, #-2147483648 + ; CHECK-ARM: bfc r0, #31, #1 + ; CHECK-NEXT: bx lr + %x = call float @llvm.fabs.f32(float %a) readnone + ret float %x +} + +define double @h(double %a) { + ; CHECK-LABEL: h: + ; CHECK: eor r1, r1, #-2147483648 + ; CHECK-NEXT: bx lr + %x = fsub nsz double -0.0, %a + ret double %x +} + +define float @i(float %a) { + ; CHECK-LABEL: i: + ; CHECK: eor r0, r0, #-2147483648 + ; CHECK-NEXT: bx lr + %x = fsub nsz float -0.0, %a + ret float %x +} + +declare double @llvm.fabs.f64(double) readnone +declare float @llvm.fabs.f32(float) readnone |
