diff options
| -rw-r--r-- | llvm/include/llvm/Target/TargetInstrInfo.h | 12 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/MachineSink.cpp | 9 |
2 files changed, 14 insertions, 7 deletions
diff --git a/llvm/include/llvm/Target/TargetInstrInfo.h b/llvm/include/llvm/Target/TargetInstrInfo.h index 05ba3ba5025..e24099a1a22 100644 --- a/llvm/include/llvm/Target/TargetInstrInfo.h +++ b/llvm/include/llvm/Target/TargetInstrInfo.h @@ -256,6 +256,18 @@ public: return MI->isAsCheapAsAMove(); } + /// Return true if the instruction should be sunk by MachineSink. + /// + /// MachineSink determines on its own whether the instruction is safe to sink; + /// this gives the target a hook to override the default behavior with regards + /// to which instructions should be sunk. + /// The default behavior is to not sink insert_subreg, subreg_to_reg, and + /// reg_sequence. These are meant to be close to the source to make it easier + /// to coalesce. + virtual bool shouldSink(const MachineInstr &MI) const { + return !MI.isInsertSubreg() && !MI.isSubregToReg() && !MI.isRegSequence(); + } + /// Re-issue the specified 'original' instruction at the /// specific location targeting a new destination register. /// The register in Orig->getOperand(0).getReg() will be substituted by diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp index 18aecdaba84..07fbd3d36ab 100644 --- a/llvm/lib/CodeGen/MachineSink.cpp +++ b/llvm/lib/CodeGen/MachineSink.cpp @@ -472,10 +472,6 @@ bool MachineSinking::PostponeSplitCriticalEdge(MachineInstr *MI, return true; } -static bool AvoidsSinking(MachineInstr *MI, MachineRegisterInfo *MRI) { - return MI->isInsertSubreg() || MI->isSubregToReg() || MI->isRegSequence(); -} - /// collectDebgValues - Scan instructions following MI and collect any /// matching DBG_VALUEs. static void collectDebugValues(MachineInstr *MI, @@ -724,9 +720,8 @@ static bool SinkingPreventsImplicitNullCheck(MachineInstr *MI, /// instruction out of its current block into a successor. bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore, AllSuccsCache &AllSuccessors) { - // Don't sink insert_subreg, subreg_to_reg, reg_sequence. These are meant to - // be close to the source to make it easier to coalesce. - if (AvoidsSinking(MI, MRI)) + // Don't sink instructions that the target prefers not to sink. + if (!TII->shouldSink(*MI)) return false; // Check if it's safe to move the instruction. |
