diff options
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-tzcnt-512.ll | 72 |
1 files changed, 36 insertions, 36 deletions
diff --git a/llvm/test/CodeGen/X86/vector-tzcnt-512.ll b/llvm/test/CodeGen/X86/vector-tzcnt-512.ll index 760216d561c..a196d5ee0c0 100644 --- a/llvm/test/CodeGen/X86/vector-tzcnt-512.ll +++ b/llvm/test/CodeGen/X86/vector-tzcnt-512.ll @@ -1,12 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd,-avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512CD -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512CDBW -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=-avx512cd,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512BW -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=ALL --check-prefix=AVX512VPOPCNTDQ +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512cd | FileCheck %s --check-prefix=ALL --check-prefix=AVX512CD +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512cd,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512CDBW +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512BW +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=ALL --check-prefix=AVX512VPOPCNTDQ define <8 x i64> @testv8i64(<8 x i64> %in) nounwind { ; AVX512CD-LABEL: testv8i64: -; AVX512CD: ## BB#0: +; AVX512CD: # BB#0: ; AVX512CD-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512CD-NEXT: vpsubq %zmm0, %zmm1, %zmm1 ; AVX512CD-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -34,7 +34,7 @@ define <8 x i64> @testv8i64(<8 x i64> %in) nounwind { ; AVX512CD-NEXT: retq ; ; AVX512CDBW-LABEL: testv8i64: -; AVX512CDBW: ## BB#0: +; AVX512CDBW: # BB#0: ; AVX512CDBW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpsubq %zmm0, %zmm1, %zmm2 ; AVX512CDBW-NEXT: vpandq %zmm2, %zmm0, %zmm0 @@ -52,7 +52,7 @@ define <8 x i64> @testv8i64(<8 x i64> %in) nounwind { ; AVX512CDBW-NEXT: retq ; ; AVX512BW-LABEL: testv8i64: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512BW-NEXT: vpsubq %zmm0, %zmm1, %zmm2 ; AVX512BW-NEXT: vpandq %zmm2, %zmm0, %zmm0 @@ -70,7 +70,7 @@ define <8 x i64> @testv8i64(<8 x i64> %in) nounwind { ; AVX512BW-NEXT: retq ; ; AVX512VPOPCNTDQ-LABEL: testv8i64: -; AVX512VPOPCNTDQ: ## BB#0: +; AVX512VPOPCNTDQ: # BB#0: ; AVX512VPOPCNTDQ-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512VPOPCNTDQ-NEXT: vpsubq %zmm0, %zmm1, %zmm1 ; AVX512VPOPCNTDQ-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -84,7 +84,7 @@ define <8 x i64> @testv8i64(<8 x i64> %in) nounwind { define <8 x i64> @testv8i64u(<8 x i64> %in) nounwind { ; AVX512CD-LABEL: testv8i64u: -; AVX512CD: ## BB#0: +; AVX512CD: # BB#0: ; AVX512CD-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512CD-NEXT: vpsubq %zmm0, %zmm1, %zmm1 ; AVX512CD-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -94,7 +94,7 @@ define <8 x i64> @testv8i64u(<8 x i64> %in) nounwind { ; AVX512CD-NEXT: retq ; ; AVX512CDBW-LABEL: testv8i64u: -; AVX512CDBW: ## BB#0: +; AVX512CDBW: # BB#0: ; AVX512CDBW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpsubq %zmm0, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -104,7 +104,7 @@ define <8 x i64> @testv8i64u(<8 x i64> %in) nounwind { ; AVX512CDBW-NEXT: retq ; ; AVX512BW-LABEL: testv8i64u: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512BW-NEXT: vpsubq %zmm0, %zmm1, %zmm2 ; AVX512BW-NEXT: vpandq %zmm2, %zmm0, %zmm0 @@ -122,7 +122,7 @@ define <8 x i64> @testv8i64u(<8 x i64> %in) nounwind { ; AVX512BW-NEXT: retq ; ; AVX512VPOPCNTDQ-LABEL: testv8i64u: -; AVX512VPOPCNTDQ: ## BB#0: +; AVX512VPOPCNTDQ: # BB#0: ; AVX512VPOPCNTDQ-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512VPOPCNTDQ-NEXT: vpsubq %zmm0, %zmm1, %zmm1 ; AVX512VPOPCNTDQ-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -136,7 +136,7 @@ define <8 x i64> @testv8i64u(<8 x i64> %in) nounwind { define <16 x i32> @testv16i32(<16 x i32> %in) nounwind { ; AVX512CD-LABEL: testv16i32: -; AVX512CD: ## BB#0: +; AVX512CD: # BB#0: ; AVX512CD-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512CD-NEXT: vpsubd %zmm0, %zmm1, %zmm1 ; AVX512CD-NEXT: vpandd %zmm1, %zmm0, %zmm0 @@ -172,7 +172,7 @@ define <16 x i32> @testv16i32(<16 x i32> %in) nounwind { ; AVX512CD-NEXT: retq ; ; AVX512CDBW-LABEL: testv16i32: -; AVX512CDBW: ## BB#0: +; AVX512CDBW: # BB#0: ; AVX512CDBW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpsubd %zmm0, %zmm1, %zmm2 ; AVX512CDBW-NEXT: vpandd %zmm2, %zmm0, %zmm0 @@ -194,7 +194,7 @@ define <16 x i32> @testv16i32(<16 x i32> %in) nounwind { ; AVX512CDBW-NEXT: retq ; ; AVX512BW-LABEL: testv16i32: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512BW-NEXT: vpsubd %zmm0, %zmm1, %zmm2 ; AVX512BW-NEXT: vpandd %zmm2, %zmm0, %zmm0 @@ -216,7 +216,7 @@ define <16 x i32> @testv16i32(<16 x i32> %in) nounwind { ; AVX512BW-NEXT: retq ; ; AVX512VPOPCNTDQ-LABEL: testv16i32: -; AVX512VPOPCNTDQ: ## BB#0: +; AVX512VPOPCNTDQ: # BB#0: ; AVX512VPOPCNTDQ-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512VPOPCNTDQ-NEXT: vpsubd %zmm0, %zmm1, %zmm1 ; AVX512VPOPCNTDQ-NEXT: vpandd %zmm1, %zmm0, %zmm0 @@ -230,7 +230,7 @@ define <16 x i32> @testv16i32(<16 x i32> %in) nounwind { define <16 x i32> @testv16i32u(<16 x i32> %in) nounwind { ; AVX512CD-LABEL: testv16i32u: -; AVX512CD: ## BB#0: +; AVX512CD: # BB#0: ; AVX512CD-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512CD-NEXT: vpsubd %zmm0, %zmm1, %zmm1 ; AVX512CD-NEXT: vpandd %zmm1, %zmm0, %zmm0 @@ -240,7 +240,7 @@ define <16 x i32> @testv16i32u(<16 x i32> %in) nounwind { ; AVX512CD-NEXT: retq ; ; AVX512CDBW-LABEL: testv16i32u: -; AVX512CDBW: ## BB#0: +; AVX512CDBW: # BB#0: ; AVX512CDBW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpsubd %zmm0, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpandd %zmm1, %zmm0, %zmm0 @@ -250,7 +250,7 @@ define <16 x i32> @testv16i32u(<16 x i32> %in) nounwind { ; AVX512CDBW-NEXT: retq ; ; AVX512BW-LABEL: testv16i32u: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512BW-NEXT: vpsubd %zmm0, %zmm1, %zmm2 ; AVX512BW-NEXT: vpandd %zmm2, %zmm0, %zmm0 @@ -272,7 +272,7 @@ define <16 x i32> @testv16i32u(<16 x i32> %in) nounwind { ; AVX512BW-NEXT: retq ; ; AVX512VPOPCNTDQ-LABEL: testv16i32u: -; AVX512VPOPCNTDQ: ## BB#0: +; AVX512VPOPCNTDQ: # BB#0: ; AVX512VPOPCNTDQ-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512VPOPCNTDQ-NEXT: vpsubd %zmm0, %zmm1, %zmm1 ; AVX512VPOPCNTDQ-NEXT: vpandd %zmm1, %zmm0, %zmm0 @@ -286,7 +286,7 @@ define <16 x i32> @testv16i32u(<16 x i32> %in) nounwind { define <32 x i16> @testv32i16(<32 x i16> %in) nounwind { ; AVX512CD-LABEL: testv32i16: -; AVX512CD: ## BB#0: +; AVX512CD: # BB#0: ; AVX512CD-NEXT: vpxor %ymm2, %ymm2, %ymm2 ; AVX512CD-NEXT: vpsubw %ymm0, %ymm2, %ymm3 ; AVX512CD-NEXT: vpand %ymm3, %ymm0, %ymm0 @@ -318,7 +318,7 @@ define <32 x i16> @testv32i16(<32 x i16> %in) nounwind { ; AVX512CD-NEXT: retq ; ; AVX512CDBW-LABEL: testv32i16: -; AVX512CDBW: ## BB#0: +; AVX512CDBW: # BB#0: ; AVX512CDBW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpsubw %zmm0, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -338,7 +338,7 @@ define <32 x i16> @testv32i16(<32 x i16> %in) nounwind { ; AVX512CDBW-NEXT: retq ; ; AVX512BW-LABEL: testv32i16: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512BW-NEXT: vpsubw %zmm0, %zmm1, %zmm1 ; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -358,7 +358,7 @@ define <32 x i16> @testv32i16(<32 x i16> %in) nounwind { ; AVX512BW-NEXT: retq ; ; AVX512VPOPCNTDQ-LABEL: testv32i16: -; AVX512VPOPCNTDQ: ## BB#0: +; AVX512VPOPCNTDQ: # BB#0: ; AVX512VPOPCNTDQ-NEXT: vpxor %ymm2, %ymm2, %ymm2 ; AVX512VPOPCNTDQ-NEXT: vpsubw %ymm0, %ymm2, %ymm3 ; AVX512VPOPCNTDQ-NEXT: vpand %ymm3, %ymm0, %ymm0 @@ -394,7 +394,7 @@ define <32 x i16> @testv32i16(<32 x i16> %in) nounwind { define <32 x i16> @testv32i16u(<32 x i16> %in) nounwind { ; AVX512CD-LABEL: testv32i16u: -; AVX512CD: ## BB#0: +; AVX512CD: # BB#0: ; AVX512CD-NEXT: vpxor %ymm2, %ymm2, %ymm2 ; AVX512CD-NEXT: vpsubw %ymm0, %ymm2, %ymm3 ; AVX512CD-NEXT: vpand %ymm3, %ymm0, %ymm0 @@ -426,7 +426,7 @@ define <32 x i16> @testv32i16u(<32 x i16> %in) nounwind { ; AVX512CD-NEXT: retq ; ; AVX512CDBW-LABEL: testv32i16u: -; AVX512CDBW: ## BB#0: +; AVX512CDBW: # BB#0: ; AVX512CDBW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpsubw %zmm0, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -446,7 +446,7 @@ define <32 x i16> @testv32i16u(<32 x i16> %in) nounwind { ; AVX512CDBW-NEXT: retq ; ; AVX512BW-LABEL: testv32i16u: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512BW-NEXT: vpsubw %zmm0, %zmm1, %zmm1 ; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -466,7 +466,7 @@ define <32 x i16> @testv32i16u(<32 x i16> %in) nounwind { ; AVX512BW-NEXT: retq ; ; AVX512VPOPCNTDQ-LABEL: testv32i16u: -; AVX512VPOPCNTDQ: ## BB#0: +; AVX512VPOPCNTDQ: # BB#0: ; AVX512VPOPCNTDQ-NEXT: vpxor %ymm2, %ymm2, %ymm2 ; AVX512VPOPCNTDQ-NEXT: vpsubw %ymm0, %ymm2, %ymm3 ; AVX512VPOPCNTDQ-NEXT: vpand %ymm3, %ymm0, %ymm0 @@ -502,7 +502,7 @@ define <32 x i16> @testv32i16u(<32 x i16> %in) nounwind { define <64 x i8> @testv64i8(<64 x i8> %in) nounwind { ; AVX512CD-LABEL: testv64i8: -; AVX512CD: ## BB#0: +; AVX512CD: # BB#0: ; AVX512CD-NEXT: vpxor %ymm2, %ymm2, %ymm2 ; AVX512CD-NEXT: vpsubb %ymm0, %ymm2, %ymm3 ; AVX512CD-NEXT: vpand %ymm3, %ymm0, %ymm0 @@ -528,7 +528,7 @@ define <64 x i8> @testv64i8(<64 x i8> %in) nounwind { ; AVX512CD-NEXT: retq ; ; AVX512CDBW-LABEL: testv64i8: -; AVX512CDBW: ## BB#0: +; AVX512CDBW: # BB#0: ; AVX512CDBW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpsubb %zmm0, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -545,7 +545,7 @@ define <64 x i8> @testv64i8(<64 x i8> %in) nounwind { ; AVX512CDBW-NEXT: retq ; ; AVX512BW-LABEL: testv64i8: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512BW-NEXT: vpsubb %zmm0, %zmm1, %zmm1 ; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -562,7 +562,7 @@ define <64 x i8> @testv64i8(<64 x i8> %in) nounwind { ; AVX512BW-NEXT: retq ; ; AVX512VPOPCNTDQ-LABEL: testv64i8: -; AVX512VPOPCNTDQ: ## BB#0: +; AVX512VPOPCNTDQ: # BB#0: ; AVX512VPOPCNTDQ-NEXT: vpxor %ymm2, %ymm2, %ymm2 ; AVX512VPOPCNTDQ-NEXT: vpsubb %ymm0, %ymm2, %ymm3 ; AVX512VPOPCNTDQ-NEXT: vpand %ymm3, %ymm0, %ymm0 @@ -592,7 +592,7 @@ define <64 x i8> @testv64i8(<64 x i8> %in) nounwind { define <64 x i8> @testv64i8u(<64 x i8> %in) nounwind { ; AVX512CD-LABEL: testv64i8u: -; AVX512CD: ## BB#0: +; AVX512CD: # BB#0: ; AVX512CD-NEXT: vpxor %ymm2, %ymm2, %ymm2 ; AVX512CD-NEXT: vpsubb %ymm0, %ymm2, %ymm3 ; AVX512CD-NEXT: vpand %ymm3, %ymm0, %ymm0 @@ -618,7 +618,7 @@ define <64 x i8> @testv64i8u(<64 x i8> %in) nounwind { ; AVX512CD-NEXT: retq ; ; AVX512CDBW-LABEL: testv64i8u: -; AVX512CDBW: ## BB#0: +; AVX512CDBW: # BB#0: ; AVX512CDBW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpsubb %zmm0, %zmm1, %zmm1 ; AVX512CDBW-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -635,7 +635,7 @@ define <64 x i8> @testv64i8u(<64 x i8> %in) nounwind { ; AVX512CDBW-NEXT: retq ; ; AVX512BW-LABEL: testv64i8u: -; AVX512BW: ## BB#0: +; AVX512BW: # BB#0: ; AVX512BW-NEXT: vpxord %zmm1, %zmm1, %zmm1 ; AVX512BW-NEXT: vpsubb %zmm0, %zmm1, %zmm1 ; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0 @@ -652,7 +652,7 @@ define <64 x i8> @testv64i8u(<64 x i8> %in) nounwind { ; AVX512BW-NEXT: retq ; ; AVX512VPOPCNTDQ-LABEL: testv64i8u: -; AVX512VPOPCNTDQ: ## BB#0: +; AVX512VPOPCNTDQ: # BB#0: ; AVX512VPOPCNTDQ-NEXT: vpxor %ymm2, %ymm2, %ymm2 ; AVX512VPOPCNTDQ-NEXT: vpsubb %ymm0, %ymm2, %ymm3 ; AVX512VPOPCNTDQ-NEXT: vpand %ymm3, %ymm0, %ymm0 |
