diff options
| -rw-r--r-- | clang/lib/CodeGen/TargetInfo.cpp | 9 | ||||
| -rw-r--r-- | clang/test/CodeGen/arm-aapcs-vfp.c | 6 |
2 files changed, 12 insertions, 3 deletions
diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp index 29899eec2e1..16dee574fd4 100644 --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -4054,7 +4054,7 @@ void ARMABIInfo::markAllocatedVFPs(unsigned Alignment, /// which have been allocated. It is valid for AllocatedGPRs to go above 4, /// this represents arguments being stored on the stack. void ARMABIInfo::markAllocatedGPRs(unsigned Alignment, - unsigned NumRequired) const { + unsigned NumRequired) const { assert((Alignment == 1 || Alignment == 2) && "Alignment must be 4 or 8 bytes"); if (Alignment == 2 && AllocatedGPRs & 0x1) @@ -4197,8 +4197,11 @@ ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, bool isVariadic, getABIKind() == ARMABIInfo::AAPCS) ABIAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8); if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64)) { - // Update Allocated GPRs - markAllocatedGPRs(1, 1); + // Update Allocated GPRs. Since this is only used when the size of the + // argument is greater than 64 bytes, this will always use up any available + // registers (of which there are 4). We also don't care about getting the + // alignment right, because general-purpose registers cannot be back-filled. + markAllocatedGPRs(1, 4); return ABIArgInfo::getIndirect(TyAlign, /*ByVal=*/true, /*Realign=*/TyAlign > ABIAlign); } diff --git a/clang/test/CodeGen/arm-aapcs-vfp.c b/clang/test/CodeGen/arm-aapcs-vfp.c index 96fd625701f..7bc1b1e55ca 100644 --- a/clang/test/CodeGen/arm-aapcs-vfp.c +++ b/clang/test/CodeGen/arm-aapcs-vfp.c @@ -139,3 +139,9 @@ void test_test_vfp_stack_gpr_split_bitfield(double a, double b, double c, double typedef struct { int x; long long y; } struct_int_long_long; // CHECK: define arm_aapcs_vfpcc void @test_vfp_stack_gpr_split_4(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i, i32 %j, [3 x i32], { [2 x i64] } %k.coerce) void test_vfp_stack_gpr_split_4(double a, double b, double c, double d, double e, double f, double g, double h, double i, int j, struct_int_long_long k) {} + +// This very large struct (passed byval) uses up the GPRs, so no padding is needed +typedef struct { int x[17]; } struct_seventeen_ints; +typedef struct { int x[4]; } struct_four_ints; +// CHECK: define arm_aapcs_vfpcc void @test_vfp_stack_gpr_split_5(%struct.struct_seventeen_ints* byval align 4 %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i, double %j, { [4 x i32] } %k.coerce) +void test_vfp_stack_gpr_split_5(struct_seventeen_ints a, double b, double c, double d, double e, double f, double g, double h, double i, double j, struct_four_ints k) {} |
