diff options
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll | 21 |
2 files changed, 24 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index e900a797cc7..270341f6680 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -1242,8 +1242,10 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) { if (!CI.getType()->isVoidTy()) ResultRegs = getOrCreateVRegs(CI); + // Ignore the callsite attributes. Backend code is most likely not expecting + // an intrinsic to sometimes have side effects and sometimes not. MachineInstrBuilder MIB = - MIRBuilder.buildIntrinsic(ID, ResultRegs, !CI.doesNotAccessMemory()); + MIRBuilder.buildIntrinsic(ID, ResultRegs, !F->doesNotAccessMemory()); if (isa<FPMathOperator>(CI)) MIB->copyIRFlags(CI); diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll new file mode 100644 index 00000000000..127430f569e --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll @@ -0,0 +1,21 @@ +; RUN: llc -mtriple=amdgcn-amd-amdhsa -global-isel -stop-after=irtranslator -o - %s | FileCheck %s + +; Make sure that an intrinsic declaration that has side effects, but +; called with a readnone call site is translated to +; G_INTRINSIC_W_SIDE_EFFECTS + +; CHECK-LABEL: name: getreg_callsite_attributes +; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.s.getreg) +; CHECK: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.s.getreg) +define amdgpu_kernel void @getreg_callsite_attributes() { + %reg0 = call i32 @llvm.amdgcn.s.getreg(i32 0) + store volatile i32 %reg0, i32 addrspace(1)* undef + %reg1 = call i32 @llvm.amdgcn.s.getreg(i32 0) #1 + store volatile i32 %reg1, i32 addrspace(1)* undef + ret void +} + +declare i32 @llvm.amdgcn.s.getreg(i32) #0 + +attributes #0 = { nounwind readonly inaccessiblememonly } +attributes #1 = { nounwind readnone } |
