diff options
30 files changed, 132 insertions, 145 deletions
diff --git a/clang-tools-extra/clangd/JSONRPCDispatcher.cpp b/clang-tools-extra/clangd/JSONRPCDispatcher.cpp index c67221a23f4..fec7cd7ec7c 100644 --- a/clang-tools-extra/clangd/JSONRPCDispatcher.cpp +++ b/clang-tools-extra/clangd/JSONRPCDispatcher.cpp @@ -196,7 +196,7 @@ void clangd::runLanguageServerLoop(std::istream &In, JSONOutput &Out, log(Context::empty(), "Warning: Duplicate Content-Length header received. " "The previous value for this message (" + - std::to_string(ContentLength) + ") was ignored.\n"); + llvm::Twine(ContentLength) + ") was ignored.\n"); } llvm::getAsUnsignedInteger(LineRef.trim(), 0, ContentLength); @@ -230,10 +230,9 @@ void clangd::runLanguageServerLoop(std::istream &In, JSONOutput &Out, // If the stream is aborted before we read ContentLength bytes, In // will have eofbit and failbit set. if (!In) { - log(Context::empty(), "Input was aborted. Read only " + - std::to_string(In.gcount()) + - " bytes of expected " + - std::to_string(ContentLength) + ".\n"); + log(Context::empty(), + "Input was aborted. Read only " + llvm::Twine(In.gcount()) + + " bytes of expected " + llvm::Twine(ContentLength) + ".\n"); break; } diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp index 6080cefac74..4d3cd121f70 100644 --- a/clang/lib/Basic/Targets/AArch64.cpp +++ b/clang/lib/Basic/Targets/AArch64.cpp @@ -159,7 +159,7 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, Builder.defineMacro("__ARM_FP_FAST", "1"); Builder.defineMacro("__ARM_SIZEOF_WCHAR_T", - llvm::utostr(Opts.WCharSize ? Opts.WCharSize : 4)); + Twine(Opts.WCharSize ? Opts.WCharSize : 4)); Builder.defineMacro("__ARM_SIZEOF_MINIMAL_ENUM", Opts.ShortEnums ? "1" : "4"); diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp index fe261b77485..6fb0ab41ff5 100644 --- a/clang/lib/Basic/Targets/ARM.cpp +++ b/clang/lib/Basic/Targets/ARM.cpp @@ -582,7 +582,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts, // ACLE 6.4.4 LDREX/STREX if (LDREX) - Builder.defineMacro("__ARM_FEATURE_LDREX", "0x" + llvm::utohexstr(LDREX)); + Builder.defineMacro("__ARM_FEATURE_LDREX", "0x" + Twine::utohexstr(LDREX)); // ACLE 6.4.5 CLZ if (ArchVersion == 5 || (ArchVersion == 6 && CPUProfile != "M") || @@ -591,7 +591,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts, // ACLE 6.5.1 Hardware Floating Point if (HW_FP) - Builder.defineMacro("__ARM_FP", "0x" + llvm::utohexstr(HW_FP)); + Builder.defineMacro("__ARM_FP", "0x" + Twine::utohexstr(HW_FP)); // ACLE predefines. Builder.defineMacro("__ARM_ACLE", "200"); @@ -672,11 +672,11 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts, // current AArch32 NEON implementations do not support double-precision // floating-point even when it is present in VFP. Builder.defineMacro("__ARM_NEON_FP", - "0x" + llvm::utohexstr(HW_FP & ~HW_FP_DP)); + "0x" + Twine::utohexstr(HW_FP & ~HW_FP_DP)); } Builder.defineMacro("__ARM_SIZEOF_WCHAR_T", - llvm::utostr(Opts.WCharSize ? Opts.WCharSize : 4)); + Twine(Opts.WCharSize ? Opts.WCharSize : 4)); Builder.defineMacro("__ARM_SIZEOF_MINIMAL_ENUM", Opts.ShortEnums ? "1" : "4"); diff --git a/clang/lib/Driver/SanitizerArgs.cpp b/clang/lib/Driver/SanitizerArgs.cpp index 6ba8892f350..3c985a1f71d 100644 --- a/clang/lib/Driver/SanitizerArgs.cpp +++ b/clang/lib/Driver/SanitizerArgs.cpp @@ -794,7 +794,7 @@ void SanitizerArgs::addArgs(const ToolChain &TC, const llvm::opt::ArgList &Args, if (MsanTrackOrigins) CmdArgs.push_back(Args.MakeArgString("-fsanitize-memory-track-origins=" + - llvm::utostr(MsanTrackOrigins))); + Twine(MsanTrackOrigins))); if (MsanUseAfterDtor) CmdArgs.push_back("-fsanitize-memory-use-after-dtor"); @@ -829,7 +829,7 @@ void SanitizerArgs::addArgs(const ToolChain &TC, const llvm::opt::ArgList &Args, if (AsanFieldPadding) CmdArgs.push_back(Args.MakeArgString("-fsanitize-address-field-padding=" + - llvm::utostr(AsanFieldPadding))); + Twine(AsanFieldPadding))); if (AsanUseAfterScope) CmdArgs.push_back("-fsanitize-address-use-after-scope"); diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index 7b3f4bc9d87..8b895c4514c 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -1738,10 +1738,9 @@ void Clang::AddHexagonTargetArgs(const ArgList &Args, CmdArgs.push_back("-Wreturn-type"); if (auto G = toolchains::HexagonToolChain::getSmallDataThreshold(Args)) { - std::string N = llvm::utostr(G.getValue()); - std::string Opt = std::string("-hexagon-small-data-threshold=") + N; CmdArgs.push_back("-mllvm"); - CmdArgs.push_back(Args.MakeArgString(Opt)); + CmdArgs.push_back(Args.MakeArgString("-hexagon-small-data-threshold=" + + Twine(G.getValue()))); } if (!Args.hasArg(options::OPT_fno_short_enums)) diff --git a/clang/lib/Driver/ToolChains/CommonArgs.cpp b/clang/lib/Driver/ToolChains/CommonArgs.cpp index 60f96d03c9c..f26880123d8 100644 --- a/clang/lib/Driver/ToolChains/CommonArgs.cpp +++ b/clang/lib/Driver/ToolChains/CommonArgs.cpp @@ -419,8 +419,8 @@ void tools::AddGoldPlugin(const ToolChain &ToolChain, const ArgList &Args, CmdArgs.push_back("-plugin-opt=thinlto"); if (unsigned Parallelism = getLTOParallelism(Args, D)) - CmdArgs.push_back(Args.MakeArgString(Twine("-plugin-opt=jobs=") + - llvm::to_string(Parallelism))); + CmdArgs.push_back( + Args.MakeArgString("-plugin-opt=jobs=" + Twine(Parallelism))); // If an explicit debugger tuning argument appeared, pass it along. if (Arg *A = Args.getLastArg(options::OPT_gTune_Group, diff --git a/clang/lib/Driver/ToolChains/Darwin.cpp b/clang/lib/Driver/ToolChains/Darwin.cpp index 289f4ed92f6..2250e82d9db 100644 --- a/clang/lib/Driver/ToolChains/Darwin.cpp +++ b/clang/lib/Driver/ToolChains/Darwin.cpp @@ -545,8 +545,7 @@ void darwin::Linker::ConstructJob(Compilation &C, const JobAction &JA, if (unsigned Parallelism = getLTOParallelism(Args, getToolChain().getDriver())) { CmdArgs.push_back("-mllvm"); - CmdArgs.push_back( - Args.MakeArgString(Twine("-threads=") + llvm::to_string(Parallelism))); + CmdArgs.push_back(Args.MakeArgString("-threads=" + Twine(Parallelism))); } if (getToolChain().ShouldLinkCXXStdlib(Args)) diff --git a/clang/lib/Driver/ToolChains/Hexagon.cpp b/clang/lib/Driver/ToolChains/Hexagon.cpp index f21af5b4dcf..2debf0e2de5 100644 --- a/clang/lib/Driver/ToolChains/Hexagon.cpp +++ b/clang/lib/Driver/ToolChains/Hexagon.cpp @@ -138,16 +138,15 @@ void hexagon::Assembler::ConstructJob(Compilation &C, const JobAction &JA, const Driver &D = HTC.getDriver(); ArgStringList CmdArgs; - std::string MArchString = "-march=hexagon"; - CmdArgs.push_back(Args.MakeArgString(MArchString)); + CmdArgs.push_back("-march=hexagon"); RenderExtraToolArgs(JA, CmdArgs); - std::string AsName = "hexagon-llvm-mc"; - std::string MCpuString = "-mcpu=hexagon" + - toolchains::HexagonToolChain::GetTargetCPUVersion(Args).str(); + const char *AsName = "hexagon-llvm-mc"; CmdArgs.push_back("-filetype=obj"); - CmdArgs.push_back(Args.MakeArgString(MCpuString)); + CmdArgs.push_back(Args.MakeArgString( + "-mcpu=hexagon" + + toolchains::HexagonToolChain::GetTargetCPUVersion(Args))); if (Output.isFilename()) { CmdArgs.push_back("-o"); @@ -158,8 +157,7 @@ void hexagon::Assembler::ConstructJob(Compilation &C, const JobAction &JA, } if (auto G = toolchains::HexagonToolChain::getSmallDataThreshold(Args)) { - std::string N = llvm::utostr(G.getValue()); - CmdArgs.push_back(Args.MakeArgString(std::string("-gpsize=") + N)); + CmdArgs.push_back(Args.MakeArgString("-gpsize=" + Twine(G.getValue()))); } Args.AddAllArgValues(CmdArgs, options::OPT_Wa_COMMA, options::OPT_Xassembler); @@ -192,7 +190,7 @@ void hexagon::Assembler::ConstructJob(Compilation &C, const JobAction &JA, II.getInputArg().render(Args, CmdArgs); } - auto *Exec = Args.MakeArgString(HTC.GetProgramPath(AsName.c_str())); + auto *Exec = Args.MakeArgString(HTC.GetProgramPath(AsName)); C.addCommand(llvm::make_unique<Command>(JA, *this, Exec, CmdArgs, Inputs)); } @@ -243,10 +241,8 @@ constructHexagonLinkArgs(Compilation &C, const JobAction &JA, CmdArgs.push_back(Opt.c_str()); CmdArgs.push_back("-march=hexagon"); - std::string CpuVer = - toolchains::HexagonToolChain::GetTargetCPUVersion(Args).str(); - std::string MCpuString = "-mcpu=hexagon" + CpuVer; - CmdArgs.push_back(Args.MakeArgString(MCpuString)); + StringRef CpuVer = toolchains::HexagonToolChain::GetTargetCPUVersion(Args); + CmdArgs.push_back(Args.MakeArgString("-mcpu=hexagon" + CpuVer)); if (IsShared) { CmdArgs.push_back("-shared"); @@ -261,8 +257,7 @@ constructHexagonLinkArgs(Compilation &C, const JobAction &JA, CmdArgs.push_back("-pie"); if (auto G = toolchains::HexagonToolChain::getSmallDataThreshold(Args)) { - std::string N = llvm::utostr(G.getValue()); - CmdArgs.push_back(Args.MakeArgString(std::string("-G") + N)); + CmdArgs.push_back(Args.MakeArgString("-G" + Twine(G.getValue()))); UseG0 = G.getValue() == 0; } @@ -291,7 +286,7 @@ constructHexagonLinkArgs(Compilation &C, const JobAction &JA, //---------------------------------------------------------------------------- // Start Files //---------------------------------------------------------------------------- - const std::string MCpuSuffix = "/" + CpuVer; + const std::string MCpuSuffix = "/" + CpuVer.str(); const std::string MCpuG0Suffix = MCpuSuffix + "/G0"; const std::string RootDir = HTC.getHexagonTargetDir(D.InstalledDir, D.PrefixDirs) + "/"; @@ -351,7 +346,7 @@ constructHexagonLinkArgs(Compilation &C, const JobAction &JA, CmdArgs.push_back("--start-group"); if (!IsShared) { - for (const std::string &Lib : OsLibs) + for (StringRef Lib : OsLibs) CmdArgs.push_back(Args.MakeArgString("-l" + Lib)); CmdArgs.push_back("-lc"); } diff --git a/clang/test/Preprocessor/arm-acle-6.4.c b/clang/test/Preprocessor/arm-acle-6.4.c index 3102bd48cab..9e4253a3596 100644 --- a/clang/test/Preprocessor/arm-acle-6.4.c +++ b/clang/test/Preprocessor/arm-acle-6.4.c @@ -91,7 +91,7 @@ // RUN: %clang -target arm-none-linux-eabi -march=armv6k -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V6K -// CHECK-V6K: __ARM_FEATURE_LDREX 0xF +// CHECK-V6K: __ARM_FEATURE_LDREX 0xf // RUN: %clang -target arm-none-linux-eabi -march=armv7-a -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V7A @@ -101,7 +101,7 @@ // CHECK-V7A: __ARM_ARCH_PROFILE 'A' // CHECK-V7A: __ARM_FEATURE_CLZ 1 // CHECK-V7A: __ARM_FEATURE_DSP 1 -// CHECK-V7A: __ARM_FEATURE_LDREX 0xF +// CHECK-V7A: __ARM_FEATURE_LDREX 0xf // CHECK-V7A: __ARM_FEATURE_QBIT 1 // CHECK-V7A: __ARM_FEATURE_SAT 1 // CHECK-V7A: __ARM_FEATURE_SIMD32 1 @@ -129,7 +129,7 @@ // CHECK-V7VE: __ARM_FEATURE_CLZ 1 // CHECK-V7VE: __ARM_FEATURE_DSP 1 // CHECK-V7VE: __ARM_FEATURE_IDIV 1 -// CHECK-V7VE: __ARM_FEATURE_LDREX 0xF +// CHECK-V7VE: __ARM_FEATURE_LDREX 0xf // CHECK-V7VE: __ARM_FEATURE_QBIT 1 // CHECK-V7VE: __ARM_FEATURE_SAT 1 // CHECK-V7VE: __ARM_FEATURE_SIMD32 1 @@ -143,7 +143,7 @@ // CHECK-V7R: __ARM_ARCH_PROFILE 'R' // CHECK-V7R: __ARM_FEATURE_CLZ 1 // CHECK-V7R: __ARM_FEATURE_DSP 1 -// CHECK-V7R: __ARM_FEATURE_LDREX 0xF +// CHECK-V7R: __ARM_FEATURE_LDREX 0xf // CHECK-V7R: __ARM_FEATURE_QBIT 1 // CHECK-V7R: __ARM_FEATURE_SAT 1 // CHECK-V7R: __ARM_FEATURE_SIMD32 1 @@ -188,7 +188,7 @@ // CHECK-V8A: __ARM_FEATURE_CLZ 1 // CHECK-V8A: __ARM_FEATURE_DSP 1 // CHECK-V8A: __ARM_FEATURE_IDIV 1 -// CHECK-V8A: __ARM_FEATURE_LDREX 0xF +// CHECK-V8A: __ARM_FEATURE_LDREX 0xf // CHECK-V8A: __ARM_FEATURE_QBIT 1 // CHECK-V8A: __ARM_FEATURE_SAT 1 // CHECK-V8A: __ARM_FEATURE_SIMD32 1 diff --git a/clang/test/Preprocessor/arm-acle-6.5.c b/clang/test/Preprocessor/arm-acle-6.5.c index 7ad91bd7fc8..143ed75bed8 100644 --- a/clang/test/Preprocessor/arm-acle-6.5.c +++ b/clang/test/Preprocessor/arm-acle-6.5.c @@ -26,7 +26,7 @@ // RUN: %clang -target armv7a-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP // RUN: %clang -target armv7ve-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP -// CHECK-SP-DP: __ARM_FP 0xC +// CHECK-SP-DP: __ARM_FP 0xc // RUN: %clang -target arm-eabi -mfpu=vfpv3-fp16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP // RUN: %clang -target arm-eabi -mfpu=vfpv3-d16-fp16 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP @@ -40,7 +40,7 @@ // RUN: %clang -target arm-eabi -mfpu=crypto-neon-fp-armv8 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP // RUN: %clang -target armv8-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-SP-DP-HP -// CHECK-SP-DP-HP: __ARM_FP 0xE +// CHECK-SP-DP-HP: __ARM_FP 0xe // RUN: %clang -target armv4-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA // RUN: %clang -target armv5-eabi -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-NO-FMA diff --git a/clang/test/Preprocessor/arm-target-features.c b/clang/test/Preprocessor/arm-target-features.c index 0067e108d33..43c9c7c65ff 100644 --- a/clang/test/Preprocessor/arm-target-features.c +++ b/clang/test/Preprocessor/arm-target-features.c @@ -5,7 +5,7 @@ // CHECK-V8A: #define __ARM_FEATURE_CRC32 1 // CHECK-V8A: #define __ARM_FEATURE_DIRECTED_ROUNDING 1 // CHECK-V8A: #define __ARM_FEATURE_NUMERIC_MAXMIN 1 -// CHECK-V8A: #define __ARM_FP 0xE +// CHECK-V8A: #define __ARM_FP 0xe // CHECK-V8A: #define __ARM_FP16_ARGS 1 // CHECK-V8A: #define __ARM_FP16_FORMAT_IEEE 1 @@ -16,7 +16,7 @@ // CHECK-V8R: #define __ARM_FEATURE_CRC32 1 // CHECK-V8R: #define __ARM_FEATURE_DIRECTED_ROUNDING 1 // CHECK-V8R: #define __ARM_FEATURE_NUMERIC_MAXMIN 1 -// CHECK-V8R: #define __ARM_FP 0xE +// CHECK-V8R: #define __ARM_FP 0xe // RUN: %clang -target armv7a-none-linux-gnu -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V7 %s // CHECK-V7: #define __ARMEL__ 1 @@ -25,14 +25,14 @@ // CHECK-V7-NOT: __ARM_FEATURE_CRC32 // CHECK-V7-NOT: __ARM_FEATURE_NUMERIC_MAXMIN // CHECK-V7-NOT: __ARM_FEATURE_DIRECTED_ROUNDING -// CHECK-V7: #define __ARM_FP 0xC +// CHECK-V7: #define __ARM_FP 0xc // RUN: %clang -target armv7ve-none-linux-gnu -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V7VE %s // CHECK-V7VE: #define __ARMEL__ 1 // CHECK-V7VE: #define __ARM_ARCH 7 // CHECK-V7VE: #define __ARM_ARCH_7VE__ 1 // CHECK-V7VE: #define __ARM_ARCH_EXT_IDIV__ 1 -// CHECK-V7VE: #define __ARM_FP 0xC +// CHECK-V7VE: #define __ARM_FP 0xc // RUN: %clang -target x86_64-apple-macosx10.10 -arch armv7s -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V7S %s // CHECK-V7S: #define __ARMEL__ 1 @@ -41,7 +41,7 @@ // CHECK-V7S-NOT: __ARM_FEATURE_CRC32 // CHECK-V7S-NOT: __ARM_FEATURE_NUMERIC_MAXMIN // CHECK-V7S-NOT: __ARM_FEATURE_DIRECTED_ROUNDING -// CHECK-V7S: #define __ARM_FP 0xE +// CHECK-V7S: #define __ARM_FP 0xe // RUN: %clang -target armv8a -mfloat-abi=hard -x c -E -dM %s | FileCheck -match-full-lines --check-prefix=CHECK-V8-BAREHF %s // CHECK-V8-BAREHF: #define __ARMEL__ 1 @@ -50,19 +50,19 @@ // CHECK-V8-BAREHF: #define __ARM_FEATURE_CRC32 1 // CHECK-V8-BAREHF: #define __ARM_FEATURE_DIRECTED_ROUNDING 1 // CHECK-V8-BAREHF: #define __ARM_FEATURE_NUMERIC_MAXMIN 1 -// CHECK-V8-BAREHP: #define __ARM_FP 0xE +// CHECK-V8-BAREHP: #define __ARM_FP 0xe // CHECK-V8-BAREHF: #define __ARM_NEON__ 1 // CHECK-V8-BAREHF: #define __ARM_PCS_VFP 1 // CHECK-V8-BAREHF: #define __VFP_FP__ 1 // RUN: %clang -target armv8a -mfloat-abi=hard -mfpu=fp-armv8 -x c -E -dM %s | FileCheck -match-full-lines --check-prefix=CHECK-V8-BAREHF-FP %s // CHECK-V8-BAREHF-FP-NOT: __ARM_NEON__ 1 -// CHECK-V8-BAREHP-FP: #define __ARM_FP 0xE +// CHECK-V8-BAREHP-FP: #define __ARM_FP 0xe // CHECK-V8-BAREHF-FP: #define __VFP_FP__ 1 // RUN: %clang -target armv8a -mfloat-abi=hard -mfpu=neon-fp-armv8 -x c -E -dM %s | FileCheck -match-full-lines --check-prefix=CHECK-V8-BAREHF-NEON-FP %s // RUN: %clang -target armv8a -mfloat-abi=hard -mfpu=crypto-neon-fp-armv8 -x c -E -dM %s | FileCheck -match-full-lines --check-prefix=CHECK-V8-BAREHF-NEON-FP %s -// CHECK-V8-BAREHP-NEON-FP: #define __ARM_FP 0xE +// CHECK-V8-BAREHP-NEON-FP: #define __ARM_FP 0xe // CHECK-V8-BAREHF-NEON-FP: #define __ARM_NEON__ 1 // CHECK-V8-BAREHF-NEON-FP: #define __VFP_FP__ 1 @@ -88,7 +88,7 @@ // RUN: %clang -target armv8a-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=V8A %s // RUN: %clang -target armv8a-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=V8A %s // V8A:#define __ARM_ARCH_EXT_IDIV__ 1 -// V8A:#define __ARM_FP 0xE +// V8A:#define __ARM_FP 0xe // RUN: %clang -target armv8m.base-none-linux-gnu -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=V8M_BASELINE %s // V8M_BASELINE: #define __ARM_ARCH 8 @@ -111,7 +111,7 @@ // V8M_MAINLINE: #define __ARM_ARCH_PROFILE 'M' // V8M_MAINLINE-NOT: __ARM_FEATURE_CRC32 // V8M_MAINLINE-NOT: __ARM_FEATURE_DSP -// V8M_MAINLINE: #define __ARM_FP 0xE +// V8M_MAINLINE: #define __ARM_FP 0xe // V8M_MAINLINE: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1 // RUN: %clang -target arm-none-linux-gnu -march=armv8-m.main+dsp -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=V8M_MAINLINE_DSP %s @@ -123,7 +123,7 @@ // V8M_MAINLINE_DSP: #define __ARM_ARCH_PROFILE 'M' // V8M_MAINLINE_DSP-NOT: __ARM_FEATURE_CRC32 // V8M_MAINLINE_DSP: #define __ARM_FEATURE_DSP 1 -// V8M_MAINLINE_DSP: #define __ARM_FP 0xE +// V8M_MAINLINE_DSP: #define __ARM_FP 0xe // V8M_MAINLINE_DSP: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1 // RUN: %clang -target arm-none-linux-gnu -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-DEFS %s @@ -161,7 +161,7 @@ // Check that -mfpu works properly for Cortex-A7 (enabled by default). // RUN: %clang -target armv7-none-linux-gnueabi -mcpu=cortex-a7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A7 %s // RUN: %clang -target armv7-none-linux-gnueabi -mthumb -mcpu=cortex-a7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A7 %s -// DEFAULTFPU-A7:#define __ARM_FP 0xE +// DEFAULTFPU-A7:#define __ARM_FP 0xe // DEFAULTFPU-A7:#define __ARM_NEON__ 1 // DEFAULTFPU-A7:#define __ARM_VFPV4__ 1 @@ -173,14 +173,14 @@ // RUN: %clang -target armv7-none-linux-gnueabi -mcpu=cortex-a7 -mfpu=vfp4 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=NONEON-A7 %s // RUN: %clang -target armv7-none-linux-gnueabi -mthumb -mcpu=cortex-a7 -mfpu=vfp4 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=NONEON-A7 %s -// NONEON-A7:#define __ARM_FP 0xE +// NONEON-A7:#define __ARM_FP 0xe // NONEON-A7-NOT:#define __ARM_NEON__ 1 // NONEON-A7:#define __ARM_VFPV4__ 1 // Check that -mfpu works properly for Cortex-A5 (enabled by default). // RUN: %clang -target armv7-none-linux-gnueabi -mcpu=cortex-a5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A5 %s // RUN: %clang -target armv7-none-linux-gnueabi -mthumb -mcpu=cortex-a5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A5 %s -// DEFAULTFPU-A5:#define __ARM_FP 0xE +// DEFAULTFPU-A5:#define __ARM_FP 0xe // DEFAULTFPU-A5:#define __ARM_NEON__ 1 // DEFAULTFPU-A5:#define __ARM_VFPV4__ 1 @@ -192,7 +192,7 @@ // RUN: %clang -target armv7-none-linux-gnueabi -mcpu=cortex-a5 -mfpu=vfp4-d16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=NONEON-A5 %s // RUN: %clang -target armv7-none-linux-gnueabi -mthumb -mcpu=cortex-a5 -mfpu=vfp4-d16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=NONEON-A5 %s -// NONEON-A5:#define __ARM_FP 0xE +// NONEON-A5:#define __ARM_FP 0xe // NONEON-A5-NOT:#define __ARM_NEON__ 1 // NONEON-A5:#define __ARM_VFPV4__ 1 @@ -218,7 +218,7 @@ // A5-NOT: #define __ARM_FEATURE_DIRECTED_ROUNDING // A5:#define __ARM_FEATURE_DSP 1 // A5-NOT: #define __ARM_FEATURE_NUMERIC_MAXMIN -// A5:#define __ARM_FP 0xE +// A5:#define __ARM_FP 0xe // Test whether predefines are as expected when targeting cortex-a7. // RUN: %clang -target armv7k -mcpu=cortex-a7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A7 %s @@ -228,7 +228,7 @@ // A7:#define __ARM_ARCH_PROFILE 'A' // A7-NOT:#define __ARM_DWARF_EH__ 1 // A7:#define __ARM_FEATURE_DSP 1 -// A7:#define __ARM_FP 0xE +// A7:#define __ARM_FP 0xe // Test whether predefines are as expected when targeting cortex-a7. // RUN: %clang -target x86_64-apple-darwin -arch armv7k -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARMV7K %s @@ -237,7 +237,7 @@ // ARMV7K:#define __ARM_ARCH_PROFILE 'A' // ARMV7K:#define __ARM_DWARF_EH__ 1 // ARMV7K:#define __ARM_FEATURE_DSP 1 -// ARMV7K:#define __ARM_FP 0xE +// ARMV7K:#define __ARM_FP 0xe // ARMV7K:#define __ARM_PCS_VFP 1 @@ -246,20 +246,20 @@ // RUN: %clang -target armv7 -mthumb -mcpu=cortex-a8 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A8 %s // A8-NOT:#define __ARM_ARCH_EXT_IDIV__ // A8:#define __ARM_FEATURE_DSP 1 -// A8:#define __ARM_FP 0xC +// A8:#define __ARM_FP 0xc // Test whether predefines are as expected when targeting cortex-a9. // RUN: %clang -target armv7 -mcpu=cortex-a9 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A9 %s // RUN: %clang -target armv7 -mthumb -mcpu=cortex-a9 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A9 %s // A9-NOT:#define __ARM_ARCH_EXT_IDIV__ // A9:#define __ARM_FEATURE_DSP 1 -// A9:#define __ARM_FP 0xE +// A9:#define __ARM_FP 0xe // Check that -mfpu works properly for Cortex-A12 (enabled by default). // RUN: %clang -target armv7-none-linux-gnueabi -mcpu=cortex-a12 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A12 %s // RUN: %clang -target armv7-none-linux-gnueabi -mthumb -mcpu=cortex-a12 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A12 %s -// DEFAULTFPU-A12:#define __ARM_FP 0xE +// DEFAULTFPU-A12:#define __ARM_FP 0xe // DEFAULTFPU-A12:#define __ARM_NEON__ 1 // DEFAULTFPU-A12:#define __ARM_VFPV4__ 1 @@ -277,19 +277,19 @@ // A12:#define __ARM_ARCH_EXT_IDIV__ 1 // A12:#define __ARM_ARCH_PROFILE 'A' // A12:#define __ARM_FEATURE_DSP 1 -// A12:#define __ARM_FP 0xE +// A12:#define __ARM_FP 0xe // Test whether predefines are as expected when targeting cortex-a15. // RUN: %clang -target armv7 -mcpu=cortex-a15 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A15 %s // RUN: %clang -target armv7 -mthumb -mcpu=cortex-a15 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=A15 %s // A15:#define __ARM_ARCH_EXT_IDIV__ 1 // A15:#define __ARM_FEATURE_DSP 1 -// A15:#define __ARM_FP 0xE +// A15:#define __ARM_FP 0xe // Check that -mfpu works properly for Cortex-A17 (enabled by default). // RUN: %clang -target armv7-none-linux-gnueabi -mcpu=cortex-a17 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A17 %s // RUN: %clang -target armv7-none-linux-gnueabi -mthumb -mcpu=cortex-a17 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=DEFAULTFPU-A17 %s -// DEFAULTFPU-A17:#define __ARM_FP 0xE +// DEFAULTFPU-A17:#define __ARM_FP 0xe // DEFAULTFPU-A17:#define __ARM_NEON__ 1 // DEFAULTFPU-A17:#define __ARM_VFPV4__ 1 @@ -307,14 +307,14 @@ // A17:#define __ARM_ARCH_EXT_IDIV__ 1 // A17:#define __ARM_ARCH_PROFILE 'A' // A17:#define __ARM_FEATURE_DSP 1 -// A17:#define __ARM_FP 0xE +// A17:#define __ARM_FP 0xe // Test whether predefines are as expected when targeting swift. // RUN: %clang -target armv7s -mcpu=swift -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=SWIFT %s // RUN: %clang -target armv7s -mthumb -mcpu=swift -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=SWIFT %s // SWIFT:#define __ARM_ARCH_EXT_IDIV__ 1 // SWIFT:#define __ARM_FEATURE_DSP 1 -// SWIFT:#define __ARM_FP 0xE +// SWIFT:#define __ARM_FP 0xe // Test whether predefines are as expected when targeting ARMv8-A Cortex implementations // RUN: %clang -target armv8 -mcpu=cortex-a32 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARMV8 %s @@ -331,7 +331,7 @@ // RUN: %clang -target armv8 -mthumb -mcpu=cortex-a73 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARMV8 %s // ARMV8:#define __ARM_ARCH_EXT_IDIV__ 1 // ARMV8:#define __ARM_FEATURE_DSP 1 -// ARMV8:#define __ARM_FP 0xE +// ARMV8:#define __ARM_FP 0xe // Test whether predefines are as expected when targeting cortex-r4. // RUN: %clang -target armv7 -mcpu=cortex-r4 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R4-ARM %s @@ -348,19 +348,19 @@ // RUN: %clang -target armv7 -mcpu=cortex-r4f -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R4F-ARM %s // R4F-ARM-NOT:#define __ARM_ARCH_EXT_IDIV__ // R4F-ARM:#define __ARM_FEATURE_DSP 1 -// R4F-ARM:#define __ARM_FP 0xC +// R4F-ARM:#define __ARM_FP 0xc // RUN: %clang -target armv7 -mthumb -mcpu=cortex-r4f -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R4F-THUMB %s // R4F-THUMB:#define __ARM_ARCH_EXT_IDIV__ 1 // R4F-THUMB:#define __ARM_FEATURE_DSP 1 -// R4F-THUMB:#define __ARM_FP 0xC +// R4F-THUMB:#define __ARM_FP 0xc // Test whether predefines are as expected when targeting cortex-r5. // RUN: %clang -target armv7 -mcpu=cortex-r5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R5 %s // RUN: %clang -target armv7 -mthumb -mcpu=cortex-r5 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R5 %s // R5:#define __ARM_ARCH_EXT_IDIV__ 1 // R5:#define __ARM_FEATURE_DSP 1 -// R5:#define __ARM_FP 0xC +// R5:#define __ARM_FP 0xc // Test whether predefines are as expected when targeting cortex-r7 and cortex-r8. // RUN: %clang -target armv7 -mcpu=cortex-r7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R7-R8 %s @@ -369,7 +369,7 @@ // RUN: %clang -target armv7 -mthumb -mcpu=cortex-r8 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=R7-R8 %s // R7-R8:#define __ARM_ARCH_EXT_IDIV__ 1 // R7-R8:#define __ARM_FEATURE_DSP 1 -// R7-R8:#define __ARM_FP 0xE +// R7-R8:#define __ARM_FP 0xe // Test whether predefines are as expected when targeting cortex-m0. // RUN: %clang -target armv7 -mthumb -mcpu=cortex-m0 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=M0-THUMB %s @@ -397,7 +397,7 @@ // RUN: %clang -target armv7 -mthumb -mcpu=cortex-m7 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=M7-THUMB %s // M7-THUMB:#define __ARM_ARCH_EXT_IDIV__ 1 // M7-THUMB:#define __ARM_FEATURE_DSP 1 -// M7-THUMB:#define __ARM_FP 0xE +// M7-THUMB:#define __ARM_FP 0xe // M7-THUMB:#define __ARM_FPV5__ 1 // Test whether predefines are as expected when targeting v8m cores @@ -437,11 +437,11 @@ // CHECK-V81A: #define __ARM_ARCH_8_1A__ 1 // CHECK-V81A: #define __ARM_ARCH_PROFILE 'A' // CHECK-V81A: #define __ARM_FEATURE_QRDMX 1 -// CHECK-V81A: #define __ARM_FP 0xE +// CHECK-V81A: #define __ARM_FP 0xe // RUN: %clang -target armv8.2a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V82A %s // CHECK-V82A: #define __ARM_ARCH 8 // CHECK-V82A: #define __ARM_ARCH_8_2A__ 1 // CHECK-V82A: #define __ARM_ARCH_PROFILE 'A' // CHECK-V82A: #define __ARM_FEATURE_QRDMX 1 -// CHECK-V82A: #define __ARM_FP 0xE +// CHECK-V82A: #define __ARM_FP 0xe diff --git a/clang/utils/TableGen/NeonEmitter.cpp b/clang/utils/TableGen/NeonEmitter.cpp index 6982bfc43db..8117d2f4a23 100644 --- a/clang/utils/TableGen/NeonEmitter.cpp +++ b/clang/utils/TableGen/NeonEmitter.cpp @@ -2106,7 +2106,7 @@ void NeonEmitter::genOverloadTypeCheckCode(raw_ostream &OS, OverloadInfo &OI = I.second; OS << "case NEON::BI__builtin_neon_" << I.first << ": "; - OS << "mask = 0x" << utohexstr(OI.Mask) << "ULL"; + OS << "mask = 0x" << Twine::utohexstr(OI.Mask) << "ULL"; if (OI.PtrArgNum >= 0) OS << "; PtrArgNum = " << OI.PtrArgNum; if (OI.HasConstPtr) @@ -2320,7 +2320,7 @@ void NeonEmitter::run(raw_ostream &OS) { Type T2 = T; T2.makeScalar(); - OS << utostr(T.getNumElements()) << "))) "; + OS << T.getNumElements() << "))) "; OS << T2.str(); OS << " " << T.str() << ";\n"; } @@ -2350,7 +2350,7 @@ void NeonEmitter::run(raw_ostream &OS) { Type VT(TS, M); OS << "typedef struct " << VT.str() << " {\n"; OS << " " << T.str() << " val"; - OS << "[" << utostr(NumMembers) << "]"; + OS << "[" << NumMembers << "]"; OS << ";\n} "; OS << VT.str() << ";\n"; OS << "\n"; diff --git a/llvm/lib/Analysis/DemandedBits.cpp b/llvm/lib/Analysis/DemandedBits.cpp index 7276f2524fe..de7d21f9f13 100644 --- a/llvm/lib/Analysis/DemandedBits.cpp +++ b/llvm/lib/Analysis/DemandedBits.cpp @@ -385,8 +385,8 @@ bool DemandedBits::isInstructionDead(Instruction *I) { void DemandedBits::print(raw_ostream &OS) { performAnalysis(); for (auto &KV : AliveBits) { - OS << "DemandedBits: 0x" << utohexstr(KV.second.getLimitedValue()) << " for " - << *KV.first << "\n"; + OS << "DemandedBits: 0x" << Twine::utohexstr(KV.second.getLimitedValue()) + << " for " << *KV.first << '\n'; } } diff --git a/llvm/lib/LTO/ThinLTOCodeGenerator.cpp b/llvm/lib/LTO/ThinLTOCodeGenerator.cpp index c8b3892375f..abcd8905ad3 100644 --- a/llvm/lib/LTO/ThinLTOCodeGenerator.cpp +++ b/llvm/lib/LTO/ThinLTOCodeGenerator.cpp @@ -76,7 +76,7 @@ static void saveTempBitcode(const Module &TheModule, StringRef TempDir, if (TempDir.empty()) return; // User asked to save temps, let dump the bitcode file after import. - std::string SaveTempPath = (TempDir + llvm::utostr(count) + Suffix).str(); + std::string SaveTempPath = (TempDir + llvm::Twine(count) + Suffix).str(); std::error_code EC; raw_fd_ostream OS(SaveTempPath, EC, sys::fs::F_None); if (EC) diff --git a/llvm/lib/Support/ARMAttributeParser.cpp b/llvm/lib/Support/ARMAttributeParser.cpp index 3d800eb7a96..e39bddc4e8f 100644 --- a/llvm/lib/Support/ARMAttributeParser.cpp +++ b/llvm/lib/Support/ARMAttributeParser.cpp @@ -666,7 +666,7 @@ void ARMAttributeParser::ParseSubsection(const uint8_t *Data, uint32_t Length) { ParseIndexList(Data, Offset, Indicies); break; default: - errs() << "unrecognised tag: 0x" << utohexstr(Tag) << '\n'; + errs() << "unrecognised tag: 0x" << Twine::utohexstr(Tag) << '\n'; return; } diff --git a/llvm/lib/TableGen/Main.cpp b/llvm/lib/TableGen/Main.cpp index fc9d0cc0888..be35f894ccc 100644 --- a/llvm/lib/TableGen/Main.cpp +++ b/llvm/lib/TableGen/Main.cpp @@ -110,7 +110,7 @@ int llvm::TableGenMain(char *argv0, TableGenMainFn *MainFn) { return 1; if (ErrorsPrinted > 0) - return reportError(argv0, utostr(ErrorsPrinted) + " errors.\n"); + return reportError(argv0, Twine(ErrorsPrinted) + " errors.\n"); // Declare success. Out.keep(); diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp index 2aa395642c4..753cfff4cda 100644 --- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp @@ -1797,11 +1797,7 @@ void NVPTXAsmPrinter::printFPConstant(const ConstantFP *Fp, raw_ostream &O) { llvm_unreachable("unsupported fp type"); APInt API = APF.bitcastToAPInt(); - std::string hexstr(utohexstr(API.getZExtValue())); - O << lead; - if (hexstr.length() < numHex) - O << std::string(numHex - hexstr.length(), '0'); - O << utohexstr(API.getZExtValue()); + O << lead << format_hex_no_prefix(API.getZExtValue(), numHex, /*Upper=*/true); } void NVPTXAsmPrinter::printScalarConstant(const Constant *CPV, raw_ostream &O) { diff --git a/llvm/lib/Target/NVPTX/NVPTXMCExpr.cpp b/llvm/lib/Target/NVPTX/NVPTXMCExpr.cpp index 86a28f7d070..a754a6a36da 100644 --- a/llvm/lib/Target/NVPTX/NVPTXMCExpr.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXMCExpr.cpp @@ -11,6 +11,7 @@ #include "llvm/ADT/StringExtras.h" #include "llvm/MC/MCAssembler.h" #include "llvm/MC/MCContext.h" +#include "llvm/Support/Format.h" using namespace llvm; #define DEBUG_TYPE "nvptx-mcexpr" @@ -47,10 +48,7 @@ void NVPTXFloatMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const { } APInt API = APF.bitcastToAPInt(); - std::string HexStr(utohexstr(API.getZExtValue())); - if (HexStr.length() < NumHex) - OS << std::string(NumHex - HexStr.length(), '0'); - OS << utohexstr(API.getZExtValue()); + OS << format_hex_no_prefix(API.getZExtValue(), NumHex, /*Upper=*/true); } const NVPTXGenericMCSymbolRefExpr* diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp index d19463ccb51..204d97cbdd4 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp @@ -190,7 +190,7 @@ void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) { if (isVerbose()) { OutStreamer->AddComment("fallthrough-return: $pop" + - utostr(MFI->getWARegStackId( + Twine(MFI->getWARegStackId( MFI->getWAReg(MI->getOperand(0).getReg())))); OutStreamer->AddBlankLine(); } diff --git a/llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp b/llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp index 94513307405..caffc03339c 100644 --- a/llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp +++ b/llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp @@ -90,8 +90,7 @@ void promoteTypeIds(Module &M, StringRef ModuleId) { if (isa<MDNode>(MD) && cast<MDNode>(MD)->isDistinct()) { Metadata *&GlobalMD = LocalToGlobal[MD]; if (!GlobalMD) { - std::string NewName = - (to_string(LocalToGlobal.size()) + ModuleId).str(); + std::string NewName = (Twine(LocalToGlobal.size()) + ModuleId).str(); GlobalMD = MDString::get(M.getContext(), NewName); } diff --git a/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp index 8328d403194..8e39f24d819 100644 --- a/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp +++ b/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp @@ -2702,9 +2702,10 @@ void FunctionStackPoisoner::copyArgsPassedByValToAllocas() { unsigned Align = Arg.getParamAlignment(); if (Align == 0) Align = DL.getABITypeAlignment(Ty); - const std::string &Name = Arg.hasName() ? Arg.getName().str() : - "Arg" + llvm::to_string(Arg.getArgNo()); - AllocaInst *AI = IRB.CreateAlloca(Ty, nullptr, Twine(Name) + ".byval"); + AllocaInst *AI = IRB.CreateAlloca( + Ty, nullptr, + (Arg.hasName() ? Arg.getName() : "Arg" + Twine(Arg.getArgNo())) + + ".byval"); AI->setAlignment(Align); Arg.replaceAllUsesWith(AI); diff --git a/llvm/lib/Transforms/Scalar/GVNSink.cpp b/llvm/lib/Transforms/Scalar/GVNSink.cpp index 814a62cd7d6..bf92e43c471 100644 --- a/llvm/lib/Transforms/Scalar/GVNSink.cpp +++ b/llvm/lib/Transforms/Scalar/GVNSink.cpp @@ -641,7 +641,7 @@ Optional<SinkingInstructionCandidate> GVNSink::analyzeInstructionForSinking( DenseMap<uint32_t, unsigned> VNums; for (auto *I : Insts) { uint32_t N = VN.lookupOrAdd(I); - DEBUG(dbgs() << " VN=" << utohexstr(N) << " for" << *I << "\n"); + DEBUG(dbgs() << " VN=" << Twine::utohexstr(N) << " for" << *I << "\n"); if (N == ~0U) return None; VNums[N]++; diff --git a/llvm/tools/llvm-cov/CodeCoverage.cpp b/llvm/tools/llvm-cov/CodeCoverage.cpp index 00258f2a1b3..c5ea50bff27 100644 --- a/llvm/tools/llvm-cov/CodeCoverage.cpp +++ b/llvm/tools/llvm-cov/CodeCoverage.cpp @@ -353,13 +353,14 @@ std::unique_ptr<CoverageMapping> CodeCoverageTool::load() { auto Coverage = std::move(CoverageOrErr.get()); unsigned Mismatched = Coverage->getMismatchedCount(); if (Mismatched) { - warning(utostr(Mismatched) + " functions have mismatched data"); + warning(Twine(Mismatched) + " functions have mismatched data"); if (ViewOpts.Debug) { for (const auto &HashMismatch : Coverage->getHashMismatches()) errs() << "hash-mismatch: " << "No profile record found for '" << HashMismatch.first << "'" - << " with hash = 0x" << utohexstr(HashMismatch.second) << "\n"; + << " with hash = 0x" << Twine::utohexstr(HashMismatch.second) + << '\n'; for (const auto &CounterMismatch : Coverage->getCounterMismatches()) errs() << "counter-mismatch: " diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp index 79204c6e953..3a9112423cf 100644 --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -1643,7 +1643,7 @@ static void DisassembleObject(const ObjectFile *Obj, bool InlineRelocs) { outs() << " <" << TargetName; uint64_t Disp = Target - TargetAddress; if (Disp) - outs() << "+0x" << utohexstr(Disp); + outs() << "+0x" << Twine::utohexstr(Disp); outs() << '>'; } } diff --git a/llvm/tools/llvm-readobj/COFFDumper.cpp b/llvm/tools/llvm-readobj/COFFDumper.cpp index cf0228b1f10..28c88b66791 100644 --- a/llvm/tools/llvm-readobj/COFFDumper.cpp +++ b/llvm/tools/llvm-readobj/COFFDumper.cpp @@ -767,7 +767,7 @@ void COFFDumper::printRVATable(uint64_t TableVA, uint64_t Count, for (uintptr_t I = TableStart; I < TableEnd; I += EntrySize) { uint32_t RVA = *reinterpret_cast<const ulittle32_t *>(I); raw_ostream &OS = W.startLine(); - OS << "0x" << utohexstr(Obj->getImageBase() + RVA); + OS << "0x" << Twine::utohexstr(Obj->getImageBase() + RVA); if (PrintExtra) PrintExtra(OS, reinterpret_cast<const uint8_t *>(I)); OS << '\n'; diff --git a/llvm/tools/llvm-readobj/ELFDumper.cpp b/llvm/tools/llvm-readobj/ELFDumper.cpp index f2b93690439..5605eaea755 100644 --- a/llvm/tools/llvm-readobj/ELFDumper.cpp +++ b/llvm/tools/llvm-readobj/ELFDumper.cpp @@ -1900,8 +1900,8 @@ template <> void ELFDumper<ELFType<support::little, false>>::printAttributes() { ArrayRef<uint8_t> Contents = unwrapOrError(Obj->getSectionContents(&Sec)); if (Contents[0] != ARMBuildAttrs::Format_Version) { - errs() << "unrecognised FormatVersion: 0x" << utohexstr(Contents[0]) - << '\n'; + errs() << "unrecognised FormatVersion: 0x" + << Twine::utohexstr(Contents[0]) << '\n'; continue; } diff --git a/llvm/tools/yaml2obj/yaml2obj.cpp b/llvm/tools/yaml2obj/yaml2obj.cpp index 3e2a5ca7ae0..0f21d7a5470 100644 --- a/llvm/tools/yaml2obj/yaml2obj.cpp +++ b/llvm/tools/yaml2obj/yaml2obj.cpp @@ -65,7 +65,7 @@ static int convertYAML(yaml::Input &YIn, raw_ostream &Out) { } } while (YIn.nextDocument()); - error("yaml2obj: Cannot find the " + utostr(DocNum) + + error("yaml2obj: Cannot find the " + Twine(DocNum) + llvm::getOrdinalSuffix(DocNum) + " document"); } diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp index 7755cd1be35..64cf2331449 100644 --- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp +++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp @@ -1873,7 +1873,7 @@ TreePatternNode *TreePatternNode::InlinePatternFragments(TreePattern &TP) { // Verify that we are passing the right number of operands. if (Frag->getNumArgs() != Children.size()) { TP.error("'" + Op->getName() + "' fragment requires " + - utostr(Frag->getNumArgs()) + " operands!"); + Twine(Frag->getNumArgs()) + " operands!"); return nullptr; } @@ -2195,7 +2195,7 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) { SignBitAndAbove == 1) continue; - TP.error("Integer value '" + itostr(II->getValue()) + + TP.error("Integer value '" + Twine(II->getValue()) + "' is out of range for type '" + getEnumName(VT) + "'!"); break; } @@ -2245,9 +2245,8 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) { MadeChange |= UpdateNodeType(i, Int->IS.RetVTs[i], TP); if (getNumChildren() != NumParamVTs + 1) { - TP.error("Intrinsic '" + Int->Name + "' expects " + - utostr(NumParamVTs) + " operands, not " + - utostr(getNumChildren() - 1) + " operands!"); + TP.error("Intrinsic '" + Int->Name + "' expects " + Twine(NumParamVTs) + + " operands, not " + Twine(getNumChildren() - 1) + " operands!"); return false; } @@ -2271,7 +2270,7 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) { if (NI.getNumOperands() >= 0 && getNumChildren() != (unsigned)NI.getNumOperands()) { TP.error(getOperator()->getName() + " node requires exactly " + - itostr(NI.getNumOperands()) + " operands!"); + Twine(NI.getNumOperands()) + " operands!"); return false; } @@ -2340,7 +2339,7 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) { TreePatternNode *SubIdxChild = getChild(I + 1); if (!isOperandClass(SubIdxChild, "SubRegIndex")) { TP.error("REG_SEQUENCE requires a SubRegIndex for operand " + - itostr(I + 1) + "!"); + Twine(I + 1) + "!"); return false; } } @@ -3514,7 +3513,7 @@ const DAGInstruction &CodeGenDAGPatterns::parseInstructionPattern( CGIOperandList::OperandInfo &Op = CGI.Operands[i]; const std::string &OpName = Op.Name; if (OpName.empty()) - I->error("Operand #" + utostr(i) + " in operands list has no name!"); + I->error("Operand #" + Twine(i) + " in operands list has no name!"); if (!InstInputsCheck.count(OpName)) { // If this is an operand with a DefaultOps set filled in, we can ignore diff --git a/llvm/utils/TableGen/DFAPacketizerEmitter.cpp b/llvm/utils/TableGen/DFAPacketizerEmitter.cpp index f879a5bae21..1c1932a0144 100644 --- a/llvm/utils/TableGen/DFAPacketizerEmitter.cpp +++ b/llvm/utils/TableGen/DFAPacketizerEmitter.cpp @@ -283,10 +283,10 @@ void dbgsInsnClass(const std::vector<unsigned> &InsnClass) { if (i > 0) { DEBUG(dbgs() << ", "); } - DEBUG(dbgs() << "0x" << utohexstr(InsnClass[i])); + DEBUG(dbgs() << "0x" << Twine::utohexstr(InsnClass[i])); } DFAInput InsnInput = getDFAInsnInput(InsnClass); - DEBUG(dbgs() << " (input: 0x" << utohexstr(InsnInput) << ")"); + DEBUG(dbgs() << " (input: 0x" << Twine::utohexstr(InsnInput) << ")"); } // @@ -301,7 +301,7 @@ void dbgsStateInfo(const std::set<unsigned> &stateInfo) { if (i > 0) { DEBUG(dbgs() << ", "); } - DEBUG(dbgs() << "0x" << utohexstr(thisState)); + DEBUG(dbgs() << "0x" << Twine::utohexstr(thisState)); } } @@ -361,7 +361,7 @@ void State::AddInsnClass(std::vector<unsigned> &InsnClass, DenseSet<unsigned> VisitedResourceStates; - DEBUG(dbgs() << " thisState: 0x" << utohexstr(thisState) << "\n"); + DEBUG(dbgs() << " thisState: 0x" << Twine::utohexstr(thisState) << "\n"); AddInsnClassStages(InsnClass, ComboBitToBitsMap, numstages - 1, numstages, thisState, thisState, @@ -381,7 +381,7 @@ void State::AddInsnClassStages(std::vector<unsigned> &InsnClass, DEBUG({ dbgsIndent((1 + numstages - chkstage) << 1); dbgs() << "AddInsnClassStages " << chkstage << " (0x" - << utohexstr(thisStage) << ") from "; + << Twine::utohexstr(thisStage) << ") from "; dbgsInsnClass(InsnClass); dbgs() << "\n"; }); @@ -395,9 +395,10 @@ void State::AddInsnClassStages(std::vector<unsigned> &InsnClass, if (resourceMask & thisStage) { unsigned combo = ComboBitToBitsMap[resourceMask]; if (combo && ((~prevState & combo) != combo)) { - DEBUG(dbgs() << "\tSkipped Add 0x" << utohexstr(prevState) - << " - combo op 0x" << utohexstr(resourceMask) - << " (0x" << utohexstr(combo) <<") cannot be scheduled\n"); + DEBUG(dbgs() << "\tSkipped Add 0x" << Twine::utohexstr(prevState) + << " - combo op 0x" << Twine::utohexstr(resourceMask) + << " (0x" << Twine::utohexstr(combo) + << ") cannot be scheduled\n"); continue; } // @@ -407,11 +408,11 @@ void State::AddInsnClassStages(std::vector<unsigned> &InsnClass, unsigned ResultingResourceState = prevState | resourceMask | combo; DEBUG({ dbgsIndent((2 + numstages - chkstage) << 1); - dbgs() << "0x" << utohexstr(prevState) - << " | 0x" << utohexstr(resourceMask); + dbgs() << "0x" << Twine::utohexstr(prevState) << " | 0x" + << Twine::utohexstr(resourceMask); if (combo) - dbgs() << " | 0x" << utohexstr(combo); - dbgs() << " = 0x" << utohexstr(ResultingResourceState) << " "; + dbgs() << " | 0x" << Twine::utohexstr(combo); + dbgs() << " = 0x" << Twine::utohexstr(ResultingResourceState) << " "; }); // @@ -433,7 +434,7 @@ void State::AddInsnClassStages(std::vector<unsigned> &InsnClass, VisitedResourceStates.insert(ResultingResourceState); PossibleStates.insert(ResultingResourceState); DEBUG(dbgs() << "\tResultingResourceState: 0x" - << utohexstr(ResultingResourceState) << "\n"); + << Twine::utohexstr(ResultingResourceState) << "\n"); } else { DEBUG(dbgs() << "\tSkipped Add - state already seen\n"); } @@ -493,9 +494,10 @@ bool State::canMaybeAddInsnClass(std::vector<unsigned> &InsnClass, // These cases are caught later in AddInsnClass. unsigned combo = ComboBitToBitsMap[InsnClass[i]]; if (combo && ((~resources & combo) != combo)) { - DEBUG(dbgs() << "\tSkipped canMaybeAdd 0x" << utohexstr(resources) - << " - combo op 0x" << utohexstr(InsnClass[i]) - << " (0x" << utohexstr(combo) <<") cannot be scheduled\n"); + DEBUG(dbgs() << "\tSkipped canMaybeAdd 0x" + << Twine::utohexstr(resources) << " - combo op 0x" + << Twine::utohexstr(InsnClass[i]) << " (0x" + << Twine::utohexstr(combo) << ") cannot be scheduled\n"); available = false; break; } @@ -573,9 +575,8 @@ void DFA::writeTableAndAPI(raw_ostream &OS, const std::string &TargetName, for (State::TransitionMap::iterator II = SI->Transitions.begin(), IE = SI->Transitions.end(); II != IE; ++II) { - OS << "{0x" << utohexstr(getDFAInsnInput(II->first)) << ", " - << II->second->stateNum - << "},\t"; + OS << "{0x" << Twine::utohexstr(getDFAInsnInput(II->first)) << ", " + << II->second->stateNum << "},\t"; } ValidTransitions += SI->Transitions.size(); @@ -668,8 +669,8 @@ int DFAPacketizerEmitter::collectAllFuncUnits( "Exceeded maximum number of representable resources"); unsigned FuncResources = (unsigned) (1U << j); FUNameToBitsMap[FUs[j]->getName()] = FuncResources; - DEBUG(dbgs() << " " << FUs[j]->getName() - << ":0x" << utohexstr(FuncResources)); + DEBUG(dbgs() << " " << FUs[j]->getName() << ":0x" + << Twine::utohexstr(FuncResources)); } if (((int) numFUs) > maxFUs) { maxFUs = numFUs; @@ -713,20 +714,20 @@ int DFAPacketizerEmitter::collectAllComboFuncs( const std::string &ComboFuncName = ComboFunc->getName(); unsigned ComboBit = FUNameToBitsMap[ComboFuncName]; unsigned ComboResources = ComboBit; - DEBUG(dbgs() << " combo: " << ComboFuncName - << ":0x" << utohexstr(ComboResources) << "\n"); + DEBUG(dbgs() << " combo: " << ComboFuncName << ":0x" + << Twine::utohexstr(ComboResources) << "\n"); for (unsigned k = 0, M = FuncList.size(); k < M; ++k) { std::string FuncName = FuncList[k]->getName(); unsigned FuncResources = FUNameToBitsMap[FuncName]; - DEBUG(dbgs() << " " << FuncName - << ":0x" << utohexstr(FuncResources) << "\n"); + DEBUG(dbgs() << " " << FuncName << ":0x" + << Twine::utohexstr(FuncResources) << "\n"); ComboResources |= FuncResources; } ComboBitToBitsMap[ComboBit] = ComboResources; numCombos++; DEBUG(dbgs() << " => combo bits: " << ComboFuncName << ":0x" - << utohexstr(ComboBit) << " = 0x" - << utohexstr(ComboResources) << "\n"); + << Twine::utohexstr(ComboBit) << " = 0x" + << Twine::utohexstr(ComboResources) << "\n"); } } return numCombos; @@ -781,7 +782,7 @@ int DFAPacketizerEmitter::collectOneInsnClass(const std::string &ProcName, dbglen += 8; DEBUG(dbgs() << "\t"); } - DEBUG(dbgs() << " (bits: 0x" << utohexstr(UnitBitValue) << ")\n"); + DEBUG(dbgs() << " (bits: 0x" << Twine::utohexstr(UnitBitValue) << ")\n"); } if (!UnitBits.empty()) diff --git a/llvm/utils/TableGen/IntrinsicEmitter.cpp b/llvm/utils/TableGen/IntrinsicEmitter.cpp index 37e024b1665..ba793ad9b93 100644 --- a/llvm/utils/TableGen/IntrinsicEmitter.cpp +++ b/llvm/utils/TableGen/IntrinsicEmitter.cpp @@ -448,7 +448,7 @@ void IntrinsicEmitter::EmitGenerator(const CodeGenIntrinsicTable &Ints, // If the entry fit in the table, just emit it. if (FixedEncodings[i] != ~0U) { - OS << "0x" << utohexstr(FixedEncodings[i]) << ", "; + OS << "0x" << Twine::utohexstr(FixedEncodings[i]) << ", "; continue; } |
