diff options
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/avx512-intrinsics.ll | 9 |
2 files changed, 10 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 99cc2da97af..7eab297395b 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -21641,7 +21641,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget &Subtarget, if (isAllOnesConstant(Mask)) // Return a regular (unmasked) vector load. return DAG.getLoad(VT, dl, Chain, Addr, MemIntr->getMemOperand()); if (X86::isZeroNode(Mask)) - return DAG.getUNDEF(VT); + return DAG.getMergeValues({PassThru, Chain}, dl); MVT MaskVT = MVT::getVectorVT(MVT::i1, VT.getVectorNumElements()); SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl); diff --git a/llvm/test/CodeGen/X86/avx512-intrinsics.ll b/llvm/test/CodeGen/X86/avx512-intrinsics.ll index ed562102d6a..daf97b2d133 100644 --- a/llvm/test/CodeGen/X86/avx512-intrinsics.ll +++ b/llvm/test/CodeGen/X86/avx512-intrinsics.ll @@ -280,6 +280,15 @@ define <8 x double> @test_expand_load_pd_512(i8* %addr, <8 x double> %data) { ret <8 x double> %res } +; Make sure we don't crash if you pass 0 to the mask. +define <8 x double> @test_zero_mask_expand_load_pd_512(i8* %addr, <8 x double> %data, i8 %mask) { +; CHECK-LABEL: test_zero_mask_expand_load_pd_512: +; CHECK: ## %bb.0: +; CHECK-NEXT: retq + %res = call <8 x double> @llvm.x86.avx512.mask.expand.load.pd.512(i8* %addr, <8 x double> %data, i8 0) + ret <8 x double> %res +} + define <16 x float> @test_mask_expand_load_ps_512(i8* %addr, <16 x float> %data, i16 %mask) { ; CHECK-LABEL: test_mask_expand_load_ps_512: ; CHECK: ## %bb.0: |