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-rw-r--r--llvm/include/llvm/Target/TargetRegisterInfo.h4
-rw-r--r--llvm/lib/CodeGen/LocalStackSlotAllocation.cpp2
-rw-r--r--llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp6
-rw-r--r--llvm/lib/Target/ARM/ARMBaseRegisterInfo.h4
-rw-r--r--llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp6
-rw-r--r--llvm/lib/Target/ARM/Thumb1RegisterInfo.h4
-rw-r--r--llvm/lib/Target/ARM64/ARM64RegisterInfo.cpp4
-rw-r--r--llvm/lib/Target/ARM64/ARM64RegisterInfo.h2
-rw-r--r--llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp7
-rw-r--r--llvm/lib/Target/PowerPC/PPCRegisterInfo.h4
10 files changed, 17 insertions, 26 deletions
diff --git a/llvm/include/llvm/Target/TargetRegisterInfo.h b/llvm/include/llvm/Target/TargetRegisterInfo.h
index 53fa7ca7167..b0c21c1a9c3 100644
--- a/llvm/include/llvm/Target/TargetRegisterInfo.h
+++ b/llvm/include/llvm/Target/TargetRegisterInfo.h
@@ -770,8 +770,8 @@ public:
/// resolveFrameIndex - Resolve a frame index operand of an instruction
/// to reference the indicated base register plus offset instead.
- virtual void resolveFrameIndex(MachineBasicBlock::iterator I,
- unsigned BaseReg, int64_t Offset) const {
+ virtual void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
+ int64_t Offset) const {
llvm_unreachable("resolveFrameIndex does not exist on this target");
}
diff --git a/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp b/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp
index ae69c134fdc..122d4676ea6 100644
--- a/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp
+++ b/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp
@@ -411,7 +411,7 @@ bool LocalStackSlotPass::insertFrameReferenceRegisters(MachineFunction &Fn) {
// Modify the instruction to use the new base register rather
// than the frame index operand.
- TRI->resolveFrameIndex(I, BaseReg, Offset);
+ TRI->resolveFrameIndex(*I, BaseReg, Offset);
DEBUG(dbgs() << "Resolved: " << *MI);
++NumReplacements;
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index 964289d2c11..8130a2d9e05 100644
--- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -595,10 +595,8 @@ materializeFrameBaseRegister(MachineBasicBlock *MBB,
AddDefaultCC(MIB);
}
-void
-ARMBaseRegisterInfo::resolveFrameIndex(MachineBasicBlock::iterator I,
- unsigned BaseReg, int64_t Offset) const {
- MachineInstr &MI = *I;
+void ARMBaseRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
+ int64_t Offset) const {
MachineBasicBlock &MBB = *MI.getParent();
MachineFunction &MF = *MBB.getParent();
const ARMBaseInstrInfo &TII =
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
index 4ffcec1efb7..66b3c82500e 100644
--- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
+++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
@@ -150,8 +150,8 @@ public:
void materializeFrameBaseRegister(MachineBasicBlock *MBB,
unsigned BaseReg, int FrameIdx,
int64_t Offset) const override;
- void resolveFrameIndex(MachineBasicBlock::iterator I,
- unsigned BaseReg, int64_t Offset) const override;
+ void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
+ int64_t Offset) const override;
bool isFrameOffsetLegal(const MachineInstr *MI,
int64_t Offset) const override;
diff --git a/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp b/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp
index ef1a4285f5f..f907b143ef1 100644
--- a/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp
@@ -482,10 +482,8 @@ rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx,
return Offset == 0;
}
-void
-Thumb1RegisterInfo::resolveFrameIndex(MachineBasicBlock::iterator I,
- unsigned BaseReg, int64_t Offset) const {
- MachineInstr &MI = *I;
+void Thumb1RegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
+ int64_t Offset) const {
const ARMBaseInstrInfo &TII =
*static_cast<const ARMBaseInstrInfo*>(
MI.getParent()->getParent()->getTarget().getInstrInfo());
diff --git a/llvm/lib/Target/ARM/Thumb1RegisterInfo.h b/llvm/lib/Target/ARM/Thumb1RegisterInfo.h
index 68e08c0c753..93e2b5a7916 100644
--- a/llvm/lib/Target/ARM/Thumb1RegisterInfo.h
+++ b/llvm/lib/Target/ARM/Thumb1RegisterInfo.h
@@ -47,8 +47,8 @@ public:
bool rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx,
unsigned FrameReg, int &Offset,
const ARMBaseInstrInfo &TII) const;
- void resolveFrameIndex(MachineBasicBlock::iterator I,
- unsigned BaseReg, int64_t Offset) const override;
+ void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
+ int64_t Offset) const override;
bool saveScavengerRegister(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
MachineBasicBlock::iterator &UseMI,
diff --git a/llvm/lib/Target/ARM64/ARM64RegisterInfo.cpp b/llvm/lib/Target/ARM64/ARM64RegisterInfo.cpp
index a48642caa91..4c7fc8a39d1 100644
--- a/llvm/lib/Target/ARM64/ARM64RegisterInfo.cpp
+++ b/llvm/lib/Target/ARM64/ARM64RegisterInfo.cpp
@@ -299,10 +299,8 @@ void ARM64RegisterInfo::materializeFrameBaseRegister(MachineBasicBlock *MBB,
.addImm(Shifter);
}
-void ARM64RegisterInfo::resolveFrameIndex(MachineBasicBlock::iterator I,
- unsigned BaseReg,
+void ARM64RegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
int64_t Offset) const {
- MachineInstr &MI = *I;
int Off = Offset; // ARM doesn't need the general 64-bit offsets
unsigned i = 0;
diff --git a/llvm/lib/Target/ARM64/ARM64RegisterInfo.h b/llvm/lib/Target/ARM64/ARM64RegisterInfo.h
index ac9382700c2..31d9242eab0 100644
--- a/llvm/lib/Target/ARM64/ARM64RegisterInfo.h
+++ b/llvm/lib/Target/ARM64/ARM64RegisterInfo.h
@@ -78,7 +78,7 @@ public:
void materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg,
int FrameIdx,
int64_t Offset) const override;
- void resolveFrameIndex(MachineBasicBlock::iterator I, unsigned BaseReg,
+ void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
int64_t Offset) const override;
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
unsigned FIOperandNum,
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 78c5a124fbb..4ff282edc6a 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -959,11 +959,8 @@ materializeFrameBaseRegister(MachineBasicBlock *MBB,
.addFrameIndex(FrameIdx).addImm(Offset);
}
-void
-PPCRegisterInfo::resolveFrameIndex(MachineBasicBlock::iterator I,
- unsigned BaseReg, int64_t Offset) const {
- MachineInstr &MI = *I;
-
+void PPCRegisterInfo::resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
+ int64_t Offset) const {
unsigned FIOperandNum = 0;
while (!MI.getOperand(FIOperandNum).isFI()) {
++FIOperandNum;
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.h b/llvm/lib/Target/PowerPC/PPCRegisterInfo.h
index 7a8c2aa4754..c3e54b4c44d 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.h
@@ -92,8 +92,8 @@ public:
void materializeFrameBaseRegister(MachineBasicBlock *MBB,
unsigned BaseReg, int FrameIdx,
int64_t Offset) const;
- void resolveFrameIndex(MachineBasicBlock::iterator I,
- unsigned BaseReg, int64_t Offset) const;
+ void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
+ int64_t Offset) const;
bool isFrameOffsetLegal(const MachineInstr *MI, int64_t Offset) const;
// Debug information queries.
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