diff options
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.cpp | 12 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.h | 3 |
2 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.cpp b/llvm/lib/Target/R600/SIInstrInfo.cpp index 336f6aa5667..c39b1dbb141 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.cpp +++ b/llvm/lib/Target/R600/SIInstrInfo.cpp @@ -308,6 +308,18 @@ SIInstrInfo::isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const { return RC != &AMDGPU::EXECRegRegClass; } +bool +SIInstrInfo::isTriviallyReMaterializable(const MachineInstr *MI, + AliasAnalysis *AA) const { + switch(MI->getOpcode()) { + default: return AMDGPUInstrInfo::isTriviallyReMaterializable(MI, AA); + case AMDGPU::S_MOV_B32: + case AMDGPU::S_MOV_B64: + case AMDGPU::V_MOV_B32_e32: + return MI->getOperand(1).isImm(); + } +} + namespace llvm { namespace AMDGPU { // Helper function generated by tablegen. We are wrapping this with diff --git a/llvm/lib/Target/R600/SIInstrInfo.h b/llvm/lib/Target/R600/SIInstrInfo.h index 7cfb655b36b..d143b8a5106 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.h +++ b/llvm/lib/Target/R600/SIInstrInfo.h @@ -77,6 +77,9 @@ public: virtual MachineInstr *commuteInstruction(MachineInstr *MI, bool NewMI=false) const; + bool isTriviallyReMaterializable(const MachineInstr *MI, + AliasAnalysis *AA = 0) const; + virtual unsigned getIEQOpcode() const { llvm_unreachable("Unimplemented"); } |
