diff options
| -rw-r--r-- | llvm/utils/TableGen/X86RecognizableInstr.cpp | 7 | ||||
| -rw-r--r-- | llvm/utils/TableGen/X86RecognizableInstr.h | 2 |
2 files changed, 0 insertions, 9 deletions
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.cpp b/llvm/utils/TableGen/X86RecognizableInstr.cpp index 75bf4130774..1df04224376 100644 --- a/llvm/utils/TableGen/X86RecognizableInstr.cpp +++ b/llvm/utils/TableGen/X86RecognizableInstr.cpp @@ -230,7 +230,6 @@ RecognizableInstr::RecognizableInstr(DisassemblerTables &tables, Prefix = byteFromRec(Rec, "Prefix"); Opcode = byteFromRec(Rec, "Opcode"); Form = byteFromRec(Rec, "FormBits"); - SegOvr = byteFromRec(Rec, "SegOvrBits"); HasOpSizePrefix = Rec->getValueAsBit("hasOpSizePrefix"); HasAdSizePrefix = Rec->getValueAsBit("hasAdSizePrefix"); @@ -490,12 +489,6 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const { // Filter out artificial instructions but leave in the LOCK_PREFIX so it is // printed as a separate "instruction". - // Filter out instructions with segment override prefixes. - // They're too messy to handle now and we'll special case them if needed. - - if (SegOvr) - return FILTER_STRONG; - ///////////////// // FILTER_WEAK diff --git a/llvm/utils/TableGen/X86RecognizableInstr.h b/llvm/utils/TableGen/X86RecognizableInstr.h index ff111a3dabc..ef3bdfee254 100644 --- a/llvm/utils/TableGen/X86RecognizableInstr.h +++ b/llvm/utils/TableGen/X86RecognizableInstr.h @@ -44,8 +44,6 @@ private: uint8_t Opcode; /// The form field from the record uint8_t Form; - /// The segment override field from the record - uint8_t SegOvr; /// The hasOpSizePrefix field from the record bool HasOpSizePrefix; /// The hasAdSizePrefix field from the record |
