diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSGX.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrTSX.td | 5 |
2 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSGX.td b/llvm/lib/Target/X86/X86InstrSGX.td index 84119ad5eb3..f4331c5e2d9 100644 --- a/llvm/lib/Target/X86/X86InstrSGX.td +++ b/llvm/lib/Target/X86/X86InstrSGX.td @@ -15,6 +15,7 @@ //===----------------------------------------------------------------------===// // SGX instructions +let SchedRW = [WriteSystem] in { // ENCLS - Execute an Enclave System Function of Specified Leaf Number def ENCLS : I<0x01, MRM_CF, (outs), (ins), "encls", []>, TB; @@ -22,3 +23,4 @@ def ENCLS : I<0x01, MRM_CF, (outs), (ins), // ENCLU - Execute an Enclave User Function of Specified Leaf Number def ENCLU : I<0x01, MRM_D7, (outs), (ins), "enclu", []>, TB; +} // SchedRW diff --git a/llvm/lib/Target/X86/X86InstrTSX.td b/llvm/lib/Target/X86/X86InstrTSX.td index 61aac58a491..10c6eef7863 100644 --- a/llvm/lib/Target/X86/X86InstrTSX.td +++ b/llvm/lib/Target/X86/X86InstrTSX.td @@ -18,6 +18,8 @@ def X86xtest: SDNode<"X86ISD::XTEST", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>, [SDNPHasChain, SDNPSideEffect]>; +let SchedRW = [WriteSystem] in { + let usesCustomInserter = 1 in def XBEGIN : I<0, Pseudo, (outs GR32:$dst), (ins), "# XBEGIN", [(set GR32:$dst, (int_x86_xbegin))]>, @@ -45,11 +47,14 @@ def XTEST : I<0x01, MRM_D6, (outs), (ins), def XABORT : Ii8<0xc6, MRM_F8, (outs), (ins i8imm:$imm), "xabort\t$imm", [(int_x86_xabort imm:$imm)]>, Requires<[HasRTM]>; +} // SchedRW // HLE prefixes +let SchedRW = [WriteSystem] in { let isAsmParserOnly = 1 in { def XACQUIRE_PREFIX : I<0xF2, RawFrm, (outs), (ins), "xacquire", []>; def XRELEASE_PREFIX : I<0xF3, RawFrm, (outs), (ins), "xrelease", []>; } +} // SchedRW |
