diff options
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSubtarget.cpp | 38 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSubtarget.h | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/dsp_msa_warning.ll | 44 |
3 files changed, 88 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp index f6af7e22e35..cbc2ef79e4f 100644 --- a/llvm/lib/Target/Mips/MipsSubtarget.cpp +++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp @@ -57,6 +57,10 @@ static cl::opt<bool> GPOpt("mgpopt", cl::Hidden, cl::desc("Enable gp-relative addressing of mips small data items")); +bool MipsSubtarget::DspWarningPrinted = false; + +bool MipsSubtarget::MSAWarningPrinted = false; + void MipsSubtarget::anchor() {} MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS, @@ -129,6 +133,40 @@ MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS, << "\n"; UseSmallSection = false; } + + if (hasDSPR2() && !DspWarningPrinted) { + if (hasMips64() && !hasMips64r2()) { + errs() << "warning: the 'dspr2' ASE requires MIPS64 revision 2 or " + << "greater\n"; + DspWarningPrinted = true; + } else if (hasMips32() && !hasMips32r2()) { + errs() << "warning: the 'dspr2' ASE requires MIPS32 revision 2 or " + << "greater\n"; + DspWarningPrinted = true; + } + } else if (hasDSP() && !DspWarningPrinted) { + if (hasMips64() && !hasMips64r2()) { + errs() << "warning: the 'dsp' ASE requires MIPS64 revision 2 or " + << "greater\n"; + DspWarningPrinted = true; + } else if (hasMips32() && !hasMips32r2()) { + errs() << "warning: the 'dsp' ASE requires MIPS32 revision 2 or " + << "greater\n"; + DspWarningPrinted = true; + } + } + + if (hasMSA() && !MSAWarningPrinted) { + if (hasMips64() && !hasMips64r5()) { + errs() << "warning: the 'msa' ASE requires MIPS64 revision 5 or " + << "greater\n"; + MSAWarningPrinted = true; + } else if (hasMips32() && !hasMips32r5()) { + errs() << "warning: the 'msa' ASE requires MIPS32 revision 5 or " + << "greater\n"; + MSAWarningPrinted = true; + } + } } bool MipsSubtarget::isPositionIndependent() const { diff --git a/llvm/lib/Target/Mips/MipsSubtarget.h b/llvm/lib/Target/Mips/MipsSubtarget.h index 8b10b0596e0..bdf71fce85a 100644 --- a/llvm/lib/Target/Mips/MipsSubtarget.h +++ b/llvm/lib/Target/Mips/MipsSubtarget.h @@ -44,6 +44,12 @@ class MipsSubtarget : public MipsGenSubtargetInfo { enum class CPU { P5600 }; + // Used to avoid printing dsp warnings multiple times. + static bool DspWarningPrinted; + + // Used to avoid printing msa warnings multiple times. + static bool MSAWarningPrinted; + // Mips architecture version MipsArchEnum MipsArchVersion; diff --git a/llvm/test/CodeGen/Mips/dsp_msa_warning.ll b/llvm/test/CodeGen/Mips/dsp_msa_warning.ll new file mode 100644 index 00000000000..500ca18df60 --- /dev/null +++ b/llvm/test/CodeGen/Mips/dsp_msa_warning.ll @@ -0,0 +1,44 @@ +; Check msa warnings. +; RUN: llc -march=mips -mattr=+mips32r2 -mattr=+msa -mattr=+fp64 < %s 2>&1 | \ +; RUN: FileCheck %s -check-prefix=MSA_32 +; RUN: llc -march=mips64 -mattr=+mips64r2 -mattr=+msa < %s 2>&1 | \ +; RUN: FileCheck %s -check-prefix=MSA_64 +; RUN: llc -march=mips -mattr=+mips32r5 -mattr=+msa -mattr=+fp64 < %s 2>&1 | \ +; RUN: FileCheck %s -check-prefix=MSA_32_NO_WARNING +; RUN: llc -march=mips64 -mattr=+mips64r5 -mattr=+msa < %s 2>&1 | \ +; RUN: FileCheck %s -check-prefix=MSA_64_NO_WARNING + +; Check dspr2 warnings. +; RUN: llc -march=mips -mattr=+mips32 -mattr=+dspr2 < %s 2>&1 | \ +; RUN: FileCheck %s -check-prefix=DSPR2_32 +; RUN: llc -march=mips64 -mattr=+mips64 -mattr=+dspr2 < %s 2>&1 | \ +; RUN: FileCheck %s -check-prefix=DSPR2_64 +; RUN: llc -march=mips64 -mattr=+mips64r3 -mattr=+dspr2 < %s 2>&1 | \ +; RUN: FileCheck %s -check-prefix=DSPR2_64_NO_WARNING +; RUN: llc -march=mips -mattr=+mips32r2 -mattr=+dspr2 < %s 2>&1 | \ +; RUN: FileCheck %s -check-prefix=DSPR2_32_NO_WARNING + +; Check dsp warnings. +; RUN: llc -march=mips -mattr=+mips32 -mattr=+dsp < %s 2>&1 | \ +; RUN: FileCheck %s -check-prefix=DSP_32 +; RUN: llc -march=mips64 -mattr=+mips64 -mattr=+dsp < %s 2>&1 | \ +; RUN: FileCheck %s -check-prefix=DSP_64 +; RUN: llc -march=mips -mattr=+mips32r5 -mattr=+dsp < %s 2>&1 | \ +; RUN: FileCheck %s -check-prefix=DSP_32_NO_WARNING +; RUN: llc -march=mips64 -mattr=+mips64r2 -mattr=+dsp < %s 2>&1 | \ +; RUN: FileCheck %s -check-prefix=DSP_64_NO_WARNING + +; MSA_32: warning: the 'msa' ASE requires MIPS32 revision 5 or greater +; MSA_64: warning: the 'msa' ASE requires MIPS64 revision 5 or greater +; MSA_32_NO_WARNING-NOT: warning: the 'msa' ASE requires MIPS32 revision 5 or greater +; MSA_64_NO_WARNING-NOT: warning: the 'msa' ASE requires MIPS64 revision 5 or greater + +; DSPR2_32: warning: the 'dspr2' ASE requires MIPS32 revision 2 or greater +; DSPR2_64: warning: the 'dspr2' ASE requires MIPS64 revision 2 or greater +; DSPR2_32_NO_WARNING-NOT: warning: the 'dspr2' ASE requires MIPS32 revision 2 or greater +; DSPR2_64_NO_WARNING-NOT: warning: the 'dspr2' ASE requires MIPS64 revision 2 or greater + +; DSP_32: warning: the 'dsp' ASE requires MIPS32 revision 2 or greater +; DSP_64: warning: the 'dsp' ASE requires MIPS64 revision 2 or greater +; DSP_32_NO_WARNING-NOT: warning: the 'dsp' ASE requires MIPS32 revision 2 or greater +; DSP_64_NO_WARNING-NOT: warning: the 'dsp' ASE requires MIPS64 revision 2 or greater |
