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-rw-r--r--llvm/lib/Target/Hexagon/HexagonISelLowering.cpp2
-rw-r--r--llvm/test/CodeGen/Hexagon/vect/build-vect64.ll8
2 files changed, 9 insertions, 1 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
index d375fb4702e..cdb0844e132 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -2652,7 +2652,7 @@ HexagonTargetLowering::buildVector64(ArrayRef<SDValue> Elem, const SDLoc &dl,
uint64_t Mask = (ElemTy == MVT::i8) ? 0xFFull
: (ElemTy == MVT::i16) ? 0xFFFFull : 0xFFFFFFFFull;
for (unsigned i = 0; i != Num; ++i)
- Val = (Val << W) | (Consts[i]->getZExtValue() & Mask);
+ Val = (Val << W) | (Consts[Num-1-i]->getZExtValue() & Mask);
SDValue V0 = DAG.getConstant(Val, dl, MVT::i64);
return DAG.getBitcast(VecTy, V0);
}
diff --git a/llvm/test/CodeGen/Hexagon/vect/build-vect64.ll b/llvm/test/CodeGen/Hexagon/vect/build-vect64.ll
new file mode 100644
index 00000000000..8b19e16864a
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/vect/build-vect64.ll
@@ -0,0 +1,8 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; Check that the value produced is 0x0706050403020100.
+; CHECK: r1:0 = CONST64(#506097522914230528)
+
+define <8 x i8> @fred() {
+ ret <8 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>
+}
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