diff options
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index c2f6bf32541..80e5c6edb4c 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -8009,11 +8009,19 @@ bool ARMAsmParser::parseDirectiveRegSave(SMLoc L, bool IsVector) { if (HandlerDataLoc.isValid()) return Error(L, ".save or .vsave must precede .handlerdata directive"); + // RAII object to make sure parsed operands are deleted. + struct CleanupObject { + SmallVector<MCParsedAsmOperand *, 1> Operands; + ~CleanupObject() { + for (unsigned I = 0, E = Operands.size(); I != E; ++I) + delete Operands[I]; + } + } CO; + // Parse the register list - SmallVector<MCParsedAsmOperand*, 1> Operands; - if (parseRegisterList(Operands)) + if (parseRegisterList(CO.Operands)) return true; - ARMOperand *Op = (ARMOperand*)Operands[0]; + ARMOperand *Op = (ARMOperand*)CO.Operands[0]; if (!IsVector && !Op->isRegList()) return Error(L, ".save expects GPR registers"); if (IsVector && !Op->isDPRRegList()) |
