diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ScheduleBtVer2.td | 10 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/avx-schedule.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/mmx-schedule.ll | 2 | ||||
| -rw-r--r-- | llvm/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s | 2 | ||||
| -rw-r--r-- | llvm/test/tools/llvm-mca/X86/BtVer2/resources-sse1.s | 2 |
5 files changed, 12 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td index 112b0ebf4b2..96597456f42 100644 --- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td +++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td @@ -575,7 +575,13 @@ def : InstRW<[JWriteVCVTYLd, ReadAfterLd], (instrs VCVTDQ2PDYrm, VCVTDQ2PSYrm, def JWriteVMOVNTDQSt: SchedWriteRes<[JFPU1, JSTC, JSAGU]> { let Latency = 2; } -def : InstRW<[JWriteVMOVNTDQSt], (instrs MOVNTDQmr, VMOVNTDQmr)>; +def : InstRW<[JWriteVMOVNTDQSt], (instrs MMX_MOVNTQmr, MOVNTDQmr, VMOVNTDQmr)>; + +def JWriteVMOVNTDQYSt: SchedWriteRes<[JFPU1, JSTC, JSAGU]> { + let Latency = 2; + let ResourceCycles = [2, 2, 2]; +} +def : InstRW<[JWriteVMOVNTDQYSt], (instrs VMOVNTDQYmr)>; def JWriteMOVNTSt: SchedWriteRes<[JFPU1, JSTC, JSAGU]> { let Latency = 3; @@ -586,7 +592,7 @@ def JWriteVMOVNTPYSt: SchedWriteRes<[JFPU1, JSTC, JSAGU]> { let Latency = 3; let ResourceCycles = [2, 2, 2]; } -def : InstRW<[JWriteVMOVNTPYSt], (instrs VMOVNTDQYmr, VMOVNTPDYmr, VMOVNTPSYmr)>; +def : InstRW<[JWriteVMOVNTPYSt], (instrs VMOVNTPDYmr, VMOVNTPSYmr)>; def JWriteVCVTPDY: SchedWriteRes<[JFPU1, JSTC, JFPX]> { let Latency = 6; diff --git a/llvm/test/CodeGen/X86/avx-schedule.ll b/llvm/test/CodeGen/X86/avx-schedule.ll index 11855dd225b..e4a5b83f076 100644 --- a/llvm/test/CodeGen/X86/avx-schedule.ll +++ b/llvm/test/CodeGen/X86/avx-schedule.ll @@ -2864,7 +2864,7 @@ define void @test_movntdq(<4 x i64> %a0, <4 x i64> *%a1) { ; BTVER2-LABEL: test_movntdq: ; BTVER2: # %bb.0: ; BTVER2-NEXT: #APP -; BTVER2-NEXT: vmovntdq %ymm0, (%rdi) # sched: [3:2.00] +; BTVER2-NEXT: vmovntdq %ymm0, (%rdi) # sched: [2:2.00] ; BTVER2-NEXT: #NO_APP ; BTVER2-NEXT: retq # sched: [4:1.00] ; diff --git a/llvm/test/CodeGen/X86/mmx-schedule.ll b/llvm/test/CodeGen/X86/mmx-schedule.ll index af81bf33d1b..6010b7366db 100644 --- a/llvm/test/CodeGen/X86/mmx-schedule.ll +++ b/llvm/test/CodeGen/X86/mmx-schedule.ll @@ -878,7 +878,7 @@ define void @test_movntq(x86_mmx* %a0, x86_mmx %a1) optsize { ; ; BTVER2-LABEL: test_movntq: ; BTVER2: # %bb.0: -; BTVER2-NEXT: movntq %mm0, (%rdi) # sched: [1:1.00] +; BTVER2-NEXT: movntq %mm0, (%rdi) # sched: [2:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_movntq: diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s index 06c9e74bc77..b630c84148f 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s @@ -1287,7 +1287,7 @@ vzeroupper # CHECK-NEXT: 1 3 1.00 vmovmskps %xmm0, %ecx # CHECK-NEXT: 1 3 1.00 vmovmskps %ymm0, %ecx # CHECK-NEXT: 1 2 1.00 * vmovntdq %xmm0, (%rax) -# CHECK-NEXT: 1 3 2.00 * vmovntdq %ymm0, (%rax) +# CHECK-NEXT: 1 2 2.00 * vmovntdq %ymm0, (%rax) # CHECK-NEXT: 1 5 1.00 * vmovntdqa (%rax), %xmm2 # CHECK-NEXT: 1 5 1.00 * vmovntdqa (%rax), %ymm2 # CHECK-NEXT: 1 3 1.00 * vmovntpd %xmm0, (%rax) diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/resources-sse1.s b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-sse1.s index fb7ceabac78..2e9b85a8408 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/resources-sse1.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-sse1.s @@ -251,7 +251,7 @@ xorps (%rax), %xmm2 # CHECK-NEXT: 1 6 1.00 * movlps (%rax), %xmm2 # CHECK-NEXT: 1 3 1.00 movmskps %xmm0, %ecx # CHECK-NEXT: 1 3 1.00 * movntps %xmm0, (%rax) -# CHECK-NEXT: 1 1 1.00 * * * movntq %mm0, (%rax) +# CHECK-NEXT: 1 2 1.00 * * * movntq %mm0, (%rax) # CHECK-NEXT: 1 1 0.50 movss %xmm0, %xmm2 # CHECK-NEXT: 1 1 1.00 * movss %xmm0, (%rax) # CHECK-NEXT: 1 5 1.00 * movss (%rax), %xmm2 |
