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-rw-r--r--llvm/test/CodeGen/X86/load-partial.ll212
1 files changed, 212 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/load-partial.ll b/llvm/test/CodeGen/X86/load-partial.ll
index 11cf7c41320..80046b2b914 100644
--- a/llvm/test/CodeGen/X86/load-partial.ll
+++ b/llvm/test/CodeGen/X86/load-partial.ll
@@ -31,6 +31,45 @@ define <4 x float> @load_float4_float3(<4 x float>* nocapture readonly dereferen
ret <4 x float> %r2
}
+define <4 x float> @load_float4_float3_0122(<4 x float>* nocapture readonly dereferenceable(16)) {
+; SSE2-LABEL: load_float4_float3_0122:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; SSE2-NEXT: movups (%rdi), %xmm0
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
+; SSE2-NEXT: retq
+;
+; SSSE3-LABEL: load_float4_float3_0122:
+; SSSE3: # %bb.0:
+; SSSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; SSSE3-NEXT: movups (%rdi), %xmm0
+; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: load_float4_float3_0122:
+; SSE41: # %bb.0:
+; SSE41-NEXT: movups (%rdi), %xmm0
+; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+; SSE41-NEXT: retq
+;
+; AVX-LABEL: load_float4_float3_0122:
+; AVX: # %bb.0:
+; AVX-NEXT: vmovups (%rdi), %xmm0
+; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+; AVX-NEXT: retq
+ %p0 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 0
+ %p1 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 1
+ %p2 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 2
+ %ld0 = load float, float* %p0, align 4
+ %ld1 = load float, float* %p1, align 4
+ %ld2 = load float, float* %p2, align 4
+ %r0 = insertelement <4 x float> undef, float %ld0, i32 0
+ %r1 = insertelement <4 x float> %r0, float %ld1, i32 1
+ %r2 = insertelement <4 x float> %r1, float %ld2, i32 2
+ %r3 = insertelement <4 x float> %r1, float %ld2, i32 3
+ ret <4 x float> %r3
+}
+
define <8 x float> @load_float8_float3(<4 x float>* nocapture readonly dereferenceable(16)) {
; SSE-LABEL: load_float8_float3:
; SSE: # %bb.0:
@@ -53,6 +92,45 @@ define <8 x float> @load_float8_float3(<4 x float>* nocapture readonly dereferen
ret <8 x float> %r2
}
+define <8 x float> @load_float8_float3_0122(<4 x float>* nocapture readonly dereferenceable(16)) {
+; SSE2-LABEL: load_float8_float3_0122:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; SSE2-NEXT: movups (%rdi), %xmm0
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
+; SSE2-NEXT: retq
+;
+; SSSE3-LABEL: load_float8_float3_0122:
+; SSSE3: # %bb.0:
+; SSSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; SSSE3-NEXT: movups (%rdi), %xmm0
+; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: load_float8_float3_0122:
+; SSE41: # %bb.0:
+; SSE41-NEXT: movups (%rdi), %xmm0
+; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+; SSE41-NEXT: retq
+;
+; AVX-LABEL: load_float8_float3_0122:
+; AVX: # %bb.0:
+; AVX-NEXT: vmovups (%rdi), %xmm0
+; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+; AVX-NEXT: retq
+ %p0 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 0
+ %p1 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 1
+ %p2 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 2
+ %ld0 = load float, float* %p0, align 4
+ %ld1 = load float, float* %p1, align 4
+ %ld2 = load float, float* %p2, align 4
+ %r0 = insertelement <8 x float> undef, float %ld0, i32 0
+ %r1 = insertelement <8 x float> %r0, float %ld1, i32 1
+ %r2 = insertelement <8 x float> %r1, float %ld2, i32 2
+ %r3 = insertelement <8 x float> %r1, float %ld2, i32 3
+ ret <8 x float> %r3
+}
+
define <4 x float> @load_float4_float3_as_float2_float(<4 x float>* nocapture readonly dereferenceable(16)) {
; SSE-LABEL: load_float4_float3_as_float2_float:
; SSE: # %bb.0:
@@ -75,6 +153,47 @@ define <4 x float> @load_float4_float3_as_float2_float(<4 x float>* nocapture re
ret <4 x float> %10
}
+define <4 x float> @load_float4_float3_as_float2_float_0122(<4 x float>* nocapture readonly dereferenceable(16)) {
+; SSE2-LABEL: load_float4_float3_as_float2_float_0122:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
+; SSE2-NEXT: retq
+;
+; SSSE3-LABEL: load_float4_float3_as_float2_float_0122:
+; SSSE3: # %bb.0:
+; SSSE3-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; SSSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
+; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: load_float4_float3_as_float2_float_0122:
+; SSE41: # %bb.0:
+; SSE41-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
+; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+; SSE41-NEXT: retq
+;
+; AVX-LABEL: load_float4_float3_as_float2_float_0122:
+; AVX: # %bb.0:
+; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+; AVX-NEXT: retq
+ %2 = bitcast <4 x float>* %0 to <2 x float>*
+ %3 = load <2 x float>, <2 x float>* %2, align 4
+ %4 = extractelement <2 x float> %3, i32 0
+ %5 = insertelement <4 x float> undef, float %4, i32 0
+ %6 = extractelement <2 x float> %3, i32 1
+ %7 = insertelement <4 x float> %5, float %6, i32 1
+ %8 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 2
+ %9 = load float, float* %8, align 4
+ %10 = insertelement <4 x float> %7, float %9, i32 2
+ %11 = insertelement <4 x float> %7, float %9, i32 3
+ ret <4 x float> %11
+}
+
define <4 x float> @load_float4_float3_trunc(<4 x float>* nocapture readonly dereferenceable(16)) {
; SSE-LABEL: load_float4_float3_trunc:
; SSE: # %bb.0:
@@ -103,6 +222,99 @@ define <4 x float> @load_float4_float3_trunc(<4 x float>* nocapture readonly der
ret <4 x float> %16
}
+define <4 x float> @load_float4_float3_trunc_0122(<4 x float>* nocapture readonly dereferenceable(16)) {
+; SSE2-LABEL: load_float4_float3_trunc_0122:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; SSE2-NEXT: movaps (%rdi), %xmm0
+; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
+; SSE2-NEXT: retq
+;
+; SSSE3-LABEL: load_float4_float3_trunc_0122:
+; SSSE3: # %bb.0:
+; SSSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; SSSE3-NEXT: movaps (%rdi), %xmm0
+; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: load_float4_float3_trunc_0122:
+; SSE41: # %bb.0:
+; SSE41-NEXT: movaps (%rdi), %xmm0
+; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+; SSE41-NEXT: retq
+;
+; AVX-LABEL: load_float4_float3_trunc_0122:
+; AVX: # %bb.0:
+; AVX-NEXT: vmovaps (%rdi), %xmm0
+; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+; AVX-NEXT: retq
+ %2 = bitcast <4 x float>* %0 to i64*
+ %3 = load i64, i64* %2, align 16
+ %4 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 2
+ %5 = bitcast float* %4 to i64*
+ %6 = load i64, i64* %5, align 8
+ %7 = trunc i64 %3 to i32
+ %8 = bitcast i32 %7 to float
+ %9 = insertelement <4 x float> undef, float %8, i32 0
+ %10 = lshr i64 %3, 32
+ %11 = trunc i64 %10 to i32
+ %12 = bitcast i32 %11 to float
+ %13 = insertelement <4 x float> %9, float %12, i32 1
+ %14 = trunc i64 %6 to i32
+ %15 = bitcast i32 %14 to float
+ %16 = insertelement <4 x float> %13, float %15, i32 2
+ %17 = insertelement <4 x float> %13, float %15, i32 3
+ ret <4 x float> %17
+}
+
+define <4 x float> @load_float4_float3_trunc_0123(<4 x float>* nocapture readonly dereferenceable(16)) {
+; SSE2-LABEL: load_float4_float3_trunc_0123:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movaps (%rdi), %xmm0
+; SSE2-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
+; SSE2-NEXT: retq
+;
+; SSSE3-LABEL: load_float4_float3_trunc_0123:
+; SSSE3: # %bb.0:
+; SSSE3-NEXT: movaps (%rdi), %xmm0
+; SSSE3-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
+; SSSE3-NEXT: retq
+;
+; SSE41-LABEL: load_float4_float3_trunc_0123:
+; SSE41: # %bb.0:
+; SSE41-NEXT: movaps (%rdi), %xmm0
+; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
+; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+; SSE41-NEXT: retq
+;
+; AVX-LABEL: load_float4_float3_trunc_0123:
+; AVX: # %bb.0:
+; AVX-NEXT: vmovaps (%rdi), %xmm0
+; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
+; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+; AVX-NEXT: retq
+ %2 = bitcast <4 x float>* %0 to i64*
+ %3 = load i64, i64* %2, align 16
+ %4 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 2
+ %5 = bitcast float* %4 to i64*
+ %6 = load i64, i64* %5, align 8
+ %7 = trunc i64 %3 to i32
+ %8 = bitcast i32 %7 to float
+ %9 = insertelement <4 x float> undef, float %8, i32 0
+ %10 = lshr i64 %3, 32
+ %11 = trunc i64 %10 to i32
+ %12 = bitcast i32 %11 to float
+ %13 = insertelement <4 x float> %9, float %12, i32 1
+ %14 = trunc i64 %6 to i32
+ %15 = bitcast i32 %14 to float
+ %16 = insertelement <4 x float> %13, float %15, i32 2
+ %17 = lshr i64 %6, 32
+ %18 = trunc i64 %17 to i32
+ %19 = bitcast i32 %18 to float
+ %20 = insertelement <4 x float> %16, float %19, i32 3
+ ret <4 x float> %20
+}
+
; PR21780
define <4 x double> @load_double4_0u2u(double* nocapture readonly dereferenceable(32)) {
; SSE2-LABEL: load_double4_0u2u:
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