diff options
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll | 10 |
2 files changed, 11 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index 4b8d9cc5f3b..6205676800b 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -343,7 +343,7 @@ bool IRTranslator::translateFSub(const User &U, MachineIRBuilder &MIRBuilder) { bool IRTranslator::translateFNeg(const User &U, MachineIRBuilder &MIRBuilder) { MIRBuilder.buildInstr(TargetOpcode::G_FNEG) .addDef(getOrCreateVReg(U)) - .addUse(getOrCreateVReg(*U.getOperand(1))); + .addUse(getOrCreateVReg(*U.getOperand(0))); return true; } diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll index 48a5c84e739..a4b2f848a60 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -824,6 +824,16 @@ define float @test_frem(float %arg1, float %arg2) { ret float %res } +; CHECK-LABEL: name: test_fneg +; CHECK: [[ARG1:%[0-9]+]]:_(s32) = COPY $s0 +; CHECK-NEXT: [[RES:%[0-9]+]]:_(s32) = G_FNEG [[ARG1]] +; CHECK-NEXT: $s0 = COPY [[RES]] +; CHECK-NEXT: RET_ReallyLR implicit $s0 +define float @test_fneg(float %arg1) { + %res = fneg float %arg1 + ret float %res +} + ; CHECK-LABEL: name: test_sadd_overflow ; CHECK: [[LHS:%[0-9]+]]:_(s32) = COPY $w0 ; CHECK: [[RHS:%[0-9]+]]:_(s32) = COPY $w1 |
