diff options
| -rw-r--r-- | llvm/test/CodeGen/X86/combine-or.ll | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/combine-or.ll b/llvm/test/CodeGen/X86/combine-or.ll index e17cfbeeee1..d9e241758d8 100644 --- a/llvm/test/CodeGen/X86/combine-or.ll +++ b/llvm/test/CodeGen/X86/combine-or.ll @@ -356,3 +356,47 @@ define <4 x i8> @test_crash(<4 x i8> %a, <4 x i8> %b) { ret <4 x i8> %or } +; Verify that we can fold regardless of which operand is the zeroinitializer + +define <4 x i32> @test2b(<4 x i32> %a, <4 x i32> %b) { +; CHECK-LABEL: test2b: +; CHECK: # BB#0: +; CHECK-NEXT: pxor %xmm2, %xmm2 +; CHECK-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] +; CHECK-NEXT: movq {{.*#+}} xmm1 = xmm1[0],zero +; CHECK-NEXT: por %xmm1, %xmm0 +; CHECK-NEXT: retq + %shuf1 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32><i32 0, i32 0, i32 6, i32 7> + %shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 0, i32 1, i32 4, i32 4> + %or = or <4 x i32> %shuf1, %shuf2 + ret <4 x i32> %or +} + +define <4 x i32> @test2c(<4 x i32> %a, <4 x i32> %b) { +; CHECK-LABEL: test2c: +; CHECK: # BB#0: +; CHECK-NEXT: pxor %xmm2, %xmm2 +; CHECK-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] +; CHECK-NEXT: movq {{.*#+}} xmm1 = xmm1[0],zero +; CHECK-NEXT: por %xmm1, %xmm0 +; CHECK-NEXT: retq + %shuf1 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32><i32 0, i32 0, i32 6, i32 7> + %shuf2 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %b, <4 x i32><i32 4, i32 5, i32 0, i32 0> + %or = or <4 x i32> %shuf1, %shuf2 + ret <4 x i32> %or +} + + +define <4 x i32> @test2d(<4 x i32> %a, <4 x i32> %b) { +; CHECK-LABEL: test2d: +; CHECK: # BB#0: +; CHECK-NEXT: pxor %xmm2, %xmm2 +; CHECK-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] +; CHECK-NEXT: movq {{.*#+}} xmm1 = xmm1[0],zero +; CHECK-NEXT: por %xmm1, %xmm0 +; CHECK-NEXT: retq + %shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 4, i32 2, i32 3> + %shuf2 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %b, <4 x i32><i32 4, i32 5, i32 0, i32 0> + %or = or <4 x i32> %shuf1, %shuf2 + ret <4 x i32> %or +} |
