diff options
-rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 | ||||
-rw-r--r-- | llvm/test/Transforms/InstCombine/bswap-fold.ll | 21 |
2 files changed, 12 insertions, 19 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp index cb3f3214e99..9a6199fdafb 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp @@ -82,12 +82,7 @@ static Value *getFCmpValue(unsigned Code, Value *LHS, Value *RHS, Value *InstCombiner::SimplifyBSwap(BinaryOperator &I) { assert(I.isBitwiseLogicOp() && "Unexpected opcode for bswap simplifying"); - IntegerType *ITy = dyn_cast<IntegerType>(I.getType()); - - // Can't do vectors. - if (I.getType()->isVectorTy()) - return nullptr; - + // TODO handle constant on one side with vectors. Value *OldLHS = I.getOperand(0); Value *OldRHS = I.getOperand(1); ConstantInt *ConstLHS = dyn_cast<ConstantInt>(OldLHS); @@ -115,7 +110,8 @@ Value *InstCombiner::SimplifyBSwap(BinaryOperator &I) { Builder->getInt(ConstRHS->getValue().byteSwap()); Value *BinOp = Builder->CreateBinOp(I.getOpcode(), NewLHS, NewRHS); - Function *F = Intrinsic::getDeclaration(I.getModule(), Intrinsic::bswap, ITy); + Function *F = Intrinsic::getDeclaration(I.getModule(), Intrinsic::bswap, + I.getType()); return Builder->CreateCall(F, BinOp); } diff --git a/llvm/test/Transforms/InstCombine/bswap-fold.ll b/llvm/test/Transforms/InstCombine/bswap-fold.ll index cc947bad233..3edd7b338ae 100644 --- a/llvm/test/Transforms/InstCombine/bswap-fold.ll +++ b/llvm/test/Transforms/InstCombine/bswap-fold.ll @@ -213,10 +213,9 @@ define i64 @bs_xor64(i64 %a, i64 %b) #0 { define <2 x i32> @bs_and32vec(<2 x i32> %a, <2 x i32> %b) #0 { ; CHECK-LABEL: @bs_and32vec( -; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[A:%.*]]) -; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[B:%.*]]) -; CHECK-NEXT: [[TMP3:%.*]] = and <2 x i32> [[TMP1]], [[TMP2]] -; CHECK-NEXT: ret <2 x i32> [[TMP3]] +; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], [[B:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP1]]) +; CHECK-NEXT: ret <2 x i32> [[TMP2]] ; %tmp1 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %a) %tmp2 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %b) @@ -226,10 +225,9 @@ define <2 x i32> @bs_and32vec(<2 x i32> %a, <2 x i32> %b) #0 { define <2 x i32> @bs_or32vec(<2 x i32> %a, <2 x i32> %b) #0 { ; CHECK-LABEL: @bs_or32vec( -; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[A:%.*]]) -; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[B:%.*]]) -; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i32> [[TMP1]], [[TMP2]] -; CHECK-NEXT: ret <2 x i32> [[TMP3]] +; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[A:%.*]], [[B:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP1]]) +; CHECK-NEXT: ret <2 x i32> [[TMP2]] ; %tmp1 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %a) %tmp2 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %b) @@ -239,10 +237,9 @@ define <2 x i32> @bs_or32vec(<2 x i32> %a, <2 x i32> %b) #0 { define <2 x i32> @bs_xor32vec(<2 x i32> %a, <2 x i32> %b) #0 { ; CHECK-LABEL: @bs_xor32vec( -; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[A:%.*]]) -; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[B:%.*]]) -; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i32> [[TMP1]], [[TMP2]] -; CHECK-NEXT: ret <2 x i32> [[TMP3]] +; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[A:%.*]], [[B:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP1]]) +; CHECK-NEXT: ret <2 x i32> [[TMP2]] ; %tmp1 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %a) %tmp2 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %b) |