diff options
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 7 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/legalize-fp-load-invariant.ll | 13 |
2 files changed, 16 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp index 67661cece5e..b0ae1e0399f 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp @@ -2102,13 +2102,12 @@ SDValue DAGTypeLegalizer::PromoteFloatRes_LOAD(SDNode *N) { // Load the value as an integer value with the same number of bits. EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits()); - auto MMOFlags = - L->getMemOperand()->getFlags() & - ~(MachineMemOperand::MOInvariant | MachineMemOperand::MODereferenceable); SDValue newL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), IVT, SDLoc(N), L->getChain(), L->getBasePtr(), L->getOffset(), L->getPointerInfo(), IVT, - L->getAlignment(), MMOFlags, L->getAAInfo()); + L->getAlignment(), + L->getMemOperand()->getFlags(), + L->getAAInfo()); // Legalize the chain result by replacing uses of the old value chain with the // new one ReplaceValueWith(SDValue(N, 1), newL.getValue(1)); diff --git a/llvm/test/CodeGen/AMDGPU/legalize-fp-load-invariant.ll b/llvm/test/CodeGen/AMDGPU/legalize-fp-load-invariant.ll new file mode 100644 index 00000000000..92e438c4f93 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/legalize-fp-load-invariant.ll @@ -0,0 +1,13 @@ +; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -stop-after=isel -o - %s | FileCheck -check-prefix=GCN %s + +; Type legalization for illegal FP type results was dropping invariant +; and dereferenceable flags. + +; GCN: BUFFER_LOAD_USHORT_OFFSET killed %{{[0-9]+}}, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable invariant load 2 from %ir.ptr, addrspace 4) +define half @legalize_f16_load(half addrspace(4)* dereferenceable(4) %ptr) { + %load = load half, half addrspace(4)* %ptr, !invariant.load !0 + %add = fadd half %load, 1.0 + ret half %add +} + +!0 = !{} |
