diff options
| -rw-r--r-- | llvm/include/llvm/IR/PatternMatch.h | 8 | ||||
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/vector-urem.ll | 6 |
3 files changed, 13 insertions, 4 deletions
diff --git a/llvm/include/llvm/IR/PatternMatch.h b/llvm/include/llvm/IR/PatternMatch.h index 3072bb5a240..bb225443848 100644 --- a/llvm/include/llvm/IR/PatternMatch.h +++ b/llvm/include/llvm/IR/PatternMatch.h @@ -339,6 +339,14 @@ template <typename Predicate> struct api_pred_ty : public Predicate { } }; +struct is_negative { + bool isValue(const APInt &C) { return C.isNegative(); } +}; + +/// \brief Match an integer or vector of negative values. +inline cst_pred_ty<is_negative> m_Negative() { return cst_pred_ty<is_negative>(); } +inline api_pred_ty<is_negative> m_Negative(const APInt *&V) { return V; } + struct is_power2 { bool isValue(const APInt &C) { return C.isPowerOf2(); } }; diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp index 9bbabd9203b..21318251da3 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp @@ -1604,8 +1604,7 @@ Instruction *InstCombiner::visitURem(BinaryOperator &I) { } // X urem C -> X < C ? X : X - C, where C >= signbit. - const APInt *DivisorC; - if (match(Op1, m_APInt(DivisorC)) && DivisorC->isNegative()) { + if (match(Op1, m_Negative())) { Value *Cmp = Builder.CreateICmpULT(Op0, Op1); Value *Sub = Builder.CreateSub(Op0, Op1); return SelectInst::Create(Cmp, Op0, Sub); diff --git a/llvm/test/Transforms/InstCombine/vector-urem.ll b/llvm/test/Transforms/InstCombine/vector-urem.ll index eede6807d2e..7dad59fde24 100644 --- a/llvm/test/Transforms/InstCombine/vector-urem.ll +++ b/llvm/test/Transforms/InstCombine/vector-urem.ll @@ -59,8 +59,10 @@ define <4 x i32> @test_v4i32_negconstsplat(<4 x i32> %a0) { define <4 x i32> @test_v4i32_negconst(<4 x i32> %a0) { ; CHECK-LABEL: @test_v4i32_negconst( -; CHECK-NEXT: [[TMP1:%.*]] = urem <4 x i32> [[A0:%.*]], <i32 -3, i32 -5, i32 -7, i32 -9> -; CHECK-NEXT: ret <4 x i32> [[TMP1]] +; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <4 x i32> [[A0:%.*]], <i32 -3, i32 -5, i32 -7, i32 -9> +; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i32> [[A0]], <i32 3, i32 5, i32 7, i32 9> +; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[A0]], <4 x i32> [[TMP2]] +; CHECK-NEXT: ret <4 x i32> [[TMP3]] ; %1 = urem <4 x i32> %a0, <i32 -3, i32 -5, i32 -7, i32 -9> ret <4 x i32> %1 |
