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-rw-r--r--llvm/include/llvm/CodeGen/LivePhysRegs.h7
-rw-r--r--llvm/include/llvm/CodeGen/MachineBasicBlock.h3
-rw-r--r--llvm/lib/CodeGen/BranchFolding.cpp32
-rw-r--r--llvm/lib/CodeGen/BranchFolding.h1
-rw-r--r--llvm/lib/CodeGen/BranchRelaxation.cpp14
-rw-r--r--llvm/lib/CodeGen/LivePhysRegs.cpp23
-rw-r--r--llvm/lib/CodeGen/MachineBasicBlock.cpp4
7 files changed, 54 insertions, 30 deletions
diff --git a/llvm/include/llvm/CodeGen/LivePhysRegs.h b/llvm/include/llvm/CodeGen/LivePhysRegs.h
index 15bdefb34b8..9e04c467fad 100644
--- a/llvm/include/llvm/CodeGen/LivePhysRegs.h
+++ b/llvm/include/llvm/CodeGen/LivePhysRegs.h
@@ -155,6 +155,13 @@ inline raw_ostream &operator<<(raw_ostream &OS, const LivePhysRegs& LR) {
return OS;
}
+/// Compute the live-in list for \p MBB assuming all of its successors live-in
+/// lists are up-to-date. Uses the given LivePhysReg instance \p LiveRegs; This
+/// is just here to avoid repeated heap allocations when calling this multiple
+/// times in a pass.
+void computeLiveIns(LivePhysRegs &LiveRegs, const TargetRegisterInfo &TRI,
+ MachineBasicBlock &MBB);
+
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVEPHYSREGS_H
diff --git a/llvm/include/llvm/CodeGen/MachineBasicBlock.h b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
index 18e2ed92f68..be811c6fe43 100644
--- a/llvm/include/llvm/CodeGen/MachineBasicBlock.h
+++ b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
@@ -289,6 +289,9 @@ public:
/// LiveIn insertion.
void sortUniqueLiveIns();
+ /// Clear live in list.
+ void clearLiveIns();
+
/// Add PhysReg as live in to this block, and ensure that there is a copy of
/// PhysReg to a virtual register of class RC. Return the virtual register
/// that is a copy of the live in PhysReg.
diff --git a/llvm/lib/CodeGen/BranchFolding.cpp b/llvm/lib/CodeGen/BranchFolding.cpp
index 9c30a14432b..a898e327ccc 100644
--- a/llvm/lib/CodeGen/BranchFolding.cpp
+++ b/llvm/lib/CodeGen/BranchFolding.cpp
@@ -349,37 +349,16 @@ static unsigned ComputeCommonTailLength(MachineBasicBlock *MBB1,
return TailLen;
}
-void BranchFolder::computeLiveIns(MachineBasicBlock &MBB) {
- if (!UpdateLiveIns)
- return;
-
- LiveRegs.init(*TRI);
- LiveRegs.addLiveOutsNoPristines(MBB);
- for (MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend()))
- LiveRegs.stepBackward(MI);
-
- for (unsigned Reg : LiveRegs) {
- // Skip the register if we are about to add one of its super registers.
- bool ContainsSuperReg = false;
- for (MCSuperRegIterator SReg(Reg, TRI); SReg.isValid(); ++SReg) {
- if (LiveRegs.contains(*SReg)) {
- ContainsSuperReg = true;
- break;
- }
- }
- if (ContainsSuperReg)
- continue;
- MBB.addLiveIn(Reg);
- }
-}
-
/// ReplaceTailWithBranchTo - Delete the instruction OldInst and everything
/// after it, replacing it with an unconditional branch to NewDest.
void BranchFolder::ReplaceTailWithBranchTo(MachineBasicBlock::iterator OldInst,
MachineBasicBlock *NewDest) {
TII->ReplaceTailWithBranchTo(OldInst, NewDest);
- computeLiveIns(*NewDest);
+ if (UpdateLiveIns) {
+ NewDest->clearLiveIns();
+ computeLiveIns(LiveRegs, *TRI, *NewDest);
+ }
++NumTailMerge;
}
@@ -417,7 +396,8 @@ MachineBasicBlock *BranchFolder::SplitMBBAt(MachineBasicBlock &CurMBB,
// NewMBB inherits CurMBB's block frequency.
MBBFreqInfo.setBlockFreq(NewMBB, MBBFreqInfo.getBlockFreq(&CurMBB));
- computeLiveIns(*NewMBB);
+ if (UpdateLiveIns)
+ computeLiveIns(LiveRegs, *TRI, *NewMBB);
// Add the new block to the funclet.
const auto &FuncletI = FuncletMembership.find(&CurMBB);
diff --git a/llvm/lib/CodeGen/BranchFolding.h b/llvm/lib/CodeGen/BranchFolding.h
index 096b44a043a..fc48e484292 100644
--- a/llvm/lib/CodeGen/BranchFolding.h
+++ b/llvm/lib/CodeGen/BranchFolding.h
@@ -137,7 +137,6 @@ namespace llvm {
MachineBasicBlock* PredBB,
unsigned MinCommonTailLength);
void setCommonTailEdgeWeights(MachineBasicBlock &TailMBB);
- void computeLiveIns(MachineBasicBlock &MBB);
void ReplaceTailWithBranchTo(MachineBasicBlock::iterator OldInst,
MachineBasicBlock *NewDest);
MachineBasicBlock *SplitMBBAt(MachineBasicBlock &CurMBB,
diff --git a/llvm/lib/CodeGen/BranchRelaxation.cpp b/llvm/lib/CodeGen/BranchRelaxation.cpp
index 244c01c876e..8b27570a17f 100644
--- a/llvm/lib/CodeGen/BranchRelaxation.cpp
+++ b/llvm/lib/CodeGen/BranchRelaxation.cpp
@@ -10,6 +10,7 @@
#include "llvm/CodeGen/Passes.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
+#include "llvm/CodeGen/LivePhysRegs.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/Target/TargetInstrInfo.h"
@@ -69,8 +70,10 @@ class BranchRelaxation : public MachineFunctionPass {
SmallVector<BasicBlockInfo, 16> BlockInfo;
std::unique_ptr<RegScavenger> RS;
+ LivePhysRegs LiveRegs;
MachineFunction *MF;
+ const TargetRegisterInfo *TRI;
const TargetInstrInfo *TII;
bool relaxBranchInstructions();
@@ -252,6 +255,10 @@ MachineBasicBlock *BranchRelaxation::splitBlockBeforeInstr(MachineInstr &MI,
// All BBOffsets following these blocks must be modified.
adjustBlockOffsets(*OrigBB);
+ // Need to fix live-in lists if we track liveness.
+ if (TRI->trackLivenessAfterRegAlloc(*MF))
+ computeLiveIns(LiveRegs, *TRI, *NewBB);
+
++NumSplit;
return NewBB;
@@ -411,8 +418,9 @@ bool BranchRelaxation::relaxBranchInstructions() {
for (MachineFunction::iterator I = MF->begin(); I != MF->end(); ++I) {
MachineBasicBlock &MBB = *I;
- auto Last = MBB.rbegin();
- if (Last == MBB.rend()) // Empty block.
+ // Empty block?
+ MachineBasicBlock::iterator Last = MBB.getLastNonDebugInstr();
+ if (Last == MBB.end())
continue;
// Expand the unconditional branch first if necessary. If there is a
@@ -473,7 +481,7 @@ bool BranchRelaxation::runOnMachineFunction(MachineFunction &mf) {
const TargetSubtargetInfo &ST = MF->getSubtarget();
TII = ST.getInstrInfo();
- const TargetRegisterInfo *TRI = ST.getRegisterInfo();
+ TRI = ST.getRegisterInfo();
if (TRI->trackLivenessAfterRegAlloc(*MF))
RS.reset(new RegScavenger());
diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp
index 984b299e6eb..dcc41c1718a 100644
--- a/llvm/lib/CodeGen/LivePhysRegs.cpp
+++ b/llvm/lib/CodeGen/LivePhysRegs.cpp
@@ -197,3 +197,26 @@ void LivePhysRegs::addLiveIns(const MachineBasicBlock &MBB) {
addPristines(*this, MF, MFI, *TRI);
addBlockLiveIns(MBB);
}
+
+void llvm::computeLiveIns(LivePhysRegs &LiveRegs, const TargetRegisterInfo &TRI,
+ MachineBasicBlock &MBB) {
+ assert(MBB.livein_empty());
+ LiveRegs.init(TRI);
+ LiveRegs.addLiveOutsNoPristines(MBB);
+ for (MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend()))
+ LiveRegs.stepBackward(MI);
+
+ for (unsigned Reg : LiveRegs) {
+ // Skip the register if we are about to add one of its super registers.
+ bool ContainsSuperReg = false;
+ for (MCSuperRegIterator SReg(Reg, &TRI); SReg.isValid(); ++SReg) {
+ if (LiveRegs.contains(*SReg)) {
+ ContainsSuperReg = true;
+ break;
+ }
+ }
+ if (ContainsSuperReg)
+ continue;
+ MBB.addLiveIn(Reg);
+ }
+}
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index fe258cdd92b..549424d257f 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -1288,3 +1288,7 @@ MachineBasicBlock::getEndClobberMask(const TargetRegisterInfo *TRI) const {
// care what kind of return it is, putting a mask after it is a no-op.
return isReturnBlock() && !succ_empty() ? TRI->getNoPreservedMask() : nullptr;
}
+
+void MachineBasicBlock::clearLiveIns() {
+ LiveIns.clear();
+}
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