diff options
| -rw-r--r-- | llvm/include/llvm/IR/IntrinsicsPowerPC.td | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrVSX.td | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/vsx-p9.ll | 24 |
3 files changed, 32 insertions, 2 deletions
diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td index 7f2633eb6c5..61f2c6e11cd 100644 --- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td +++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td @@ -782,6 +782,12 @@ def int_ppc_vsx_xvcmpgtsp_p : GCCBuiltin<"__builtin_vsx_xvcmpgtsp_p">, def int_ppc_vsx_xxleqv : PowerPC_VSX_Intrinsic<"xxleqv", [llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>; +def int_ppc_vsx_xviexpdp : + PowerPC_VSX_Intrinsic<"xviexpdp",[llvm_v2f64_ty], + [llvm_v2i64_ty, llvm_v2i64_ty],[IntrNoMem]>; +def int_ppc_vsx_xviexpsp : + PowerPC_VSX_Intrinsic<"xviexpsp",[llvm_v4f32_ty], + [llvm_v4i32_ty, llvm_v4i32_ty],[IntrNoMem]>; } //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td index 24411cb684f..b929e6d4f2a 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td +++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td @@ -2191,9 +2191,9 @@ let AddedComplexity = 400, Predicates = [HasP9Vector] in { // Vector Insert Exponent DP/SP def XVIEXPDP : XX3_XT5_XA5_XB5<60, 248, "xviexpdp", vsrc, vsrc, vsrc, - IIC_VecFP, []>; + IIC_VecFP, [(set v2f64: $XT,(int_ppc_vsx_xviexpdp v2i64:$XA, v2i64:$XB))]>; def XVIEXPSP : XX3_XT5_XA5_XB5<60, 216, "xviexpsp", vsrc, vsrc, vsrc, - IIC_VecFP, []>; + IIC_VecFP, [(set v4f32: $XT,(int_ppc_vsx_xviexpsp v4i32:$XA, v4i32:$XB))]>; // Vector Extract Exponent/Significand DP/SP def XVXEXPDP : XX2_XT6_XO5_XB6<60, 0, 475, "xvxexpdp", vsrc, []>; diff --git a/llvm/test/CodeGen/PowerPC/vsx-p9.ll b/llvm/test/CodeGen/PowerPC/vsx-p9.ll index 4b2dc77b439..1b092cfe4b1 100644 --- a/llvm/test/CodeGen/PowerPC/vsx-p9.ll +++ b/llvm/test/CodeGen/PowerPC/vsx-p9.ll @@ -143,4 +143,28 @@ entry: ret void } +; Function Attrs: nounwind readnone +define <4 x float> @testXVIEXPSP(<4 x i32> %a, <4 x i32> %b) { +entry: + %0 = tail call <4 x float> @llvm.ppc.vsx.xviexpsp(<4 x i32> %a, <4 x i32> %b) + ret <4 x float> %0 +; CHECK-LABEL: testXVIEXPSP +; CHECK: xviexpsp 34, 34, 35 +; CHECK: blr +} +; Function Attrs: nounwind readnone +declare <4 x float> @llvm.ppc.vsx.xviexpsp(<4 x i32>, <4 x i32>) + +; Function Attrs: nounwind readnone +define <2 x double> @testXVIEXPDP(<2 x i64> %a, <2 x i64> %b) { +entry: + %0 = tail call <2 x double> @llvm.ppc.vsx.xviexpdp(<2 x i64> %a, <2 x i64> %b) + ret <2 x double> %0 +; CHECK-LABEL: testXVIEXPDP +; CHECK: xviexpdp 34, 34, 35 +; CHECK: blr +} +; Function Attrs: nounwind readnone +declare <2 x double> @llvm.ppc.vsx.xviexpdp(<2 x i64>, <2 x i64>) + declare void @sink(...) |
