diff options
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/GlobalISel/select-binop.mir | 4 |
2 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp index e4f3fa86c13..6490d88a3c8 100644 --- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -1246,7 +1246,10 @@ bool AArch64InstructionSelector::selectArithImmed( MachineInstr *Def = MRI.getVRegDef(Root.getReg()); if (Def->getOpcode() != TargetOpcode::G_CONSTANT) return false; - Immed = Def->getOperand(1).getImm(); + MachineOperand &Op1 = Def->getOperand(1); + if (!Op1.isCImm() || Op1.getCImm()->getBitWidth() > 64) + return false; + Immed = Op1.getCImm()->getZExtValue(); } else return false; diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-binop.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-binop.mir index c922af710dc..7821bc0136a 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/select-binop.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-binop.mir @@ -137,7 +137,7 @@ body: | liveins: %w0, %w1 %0(s32) = COPY %w0 - %1(s32) = G_CONSTANT 1 + %1(s32) = G_CONSTANT i32 1 %2(s32) = G_ADD %0, %1 ... @@ -193,7 +193,7 @@ body: | successors: %bb.1 %0(s32) = COPY %w0 - %1(s32) = G_CONSTANT 1 + %1(s32) = G_CONSTANT i32 1 G_BR %bb.1 bb.1: |
