diff options
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp index b7115dcd4c4..76e82a90a32 100644 --- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp @@ -386,9 +386,11 @@ bool CombinerHelper::findPostIndexCandidate(MachineInstr &MI, Register &Addr, auto &MF = *MI.getParent()->getParent(); const auto &TLI = *MF.getSubtarget().getTargetLowering(); +#ifndef NDEBUG unsigned Opcode = MI.getOpcode(); assert(Opcode == TargetOpcode::G_LOAD || Opcode == TargetOpcode::G_SEXTLOAD || Opcode == TargetOpcode::G_ZEXTLOAD || Opcode == TargetOpcode::G_STORE); +#endif Base = MI.getOperand(1).getReg(); MachineInstr *BaseDef = MRI.getUniqueVRegDef(Base); @@ -451,9 +453,11 @@ bool CombinerHelper::findPreIndexCandidate(MachineInstr &MI, Register &Addr, auto &MF = *MI.getParent()->getParent(); const auto &TLI = *MF.getSubtarget().getTargetLowering(); +#ifndef NDEBUG unsigned Opcode = MI.getOpcode(); assert(Opcode == TargetOpcode::G_LOAD || Opcode == TargetOpcode::G_SEXTLOAD || Opcode == TargetOpcode::G_ZEXTLOAD || Opcode == TargetOpcode::G_STORE); +#endif Addr = MI.getOperand(1).getReg(); MachineInstr *AddrDef = getOpcodeDef(TargetOpcode::G_GEP, Addr, MRI); |
