diff options
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrFormats.td | 22 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 6 |
2 files changed, 24 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrFormats.td b/llvm/lib/Target/ARM/ARMInstrFormats.td index ec600b4c2c1..7e6015dff57 100644 --- a/llvm/lib/Target/ARM/ARMInstrFormats.td +++ b/llvm/lib/Target/ARM/ARMInstrFormats.td @@ -135,10 +135,30 @@ class AsI1<bits<4> opcod, dag oops, dag iops, Format f, string opc, let Inst{21-24} = opcod; let Inst{26-27} = 0; } + class AI2<bits<4> opcod, dag oops, dag iops, Format f, string opc, string asm, list<dag> pattern> : I<opcod, oops, iops, AddrMode2, Size4Bytes, IndexModeNone, f, opc, - asm, "", pattern>; + asm, "", pattern> { + let Inst{26-27} = 1; +} +class AI2ldw<bits<4> opcod, dag oops, dag iops, Format f, string opc, + string asm, list<dag> pattern> + : AI2<opcod, oops, iops, f, opc, asm, pattern> { + let Inst{20} = 1; // load bit + let Inst{21} = 0; // W bit + let Inst{22} = 0; // B bit + let Inst{24} = 1; // P bit +} +class AI2ldb<bits<4> opcod, dag oops, dag iops, Format f, string opc, + string asm, list<dag> pattern> + : AI2<opcod, oops, iops, f, opc, asm, pattern> { + let Inst{20} = 1; // load bit + let Inst{21} = 0; // W bit + let Inst{22} = 1; // B bit + let Inst{24} = 1; // P bit +} + class AI3<bits<4> opcod, dag oops, dag iops, Format f, string opc, string asm, list<dag> pattern> : I<opcod, oops, iops, AddrMode3, Size4Bytes, IndexModeNone, f, opc, diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index aa6512f129f..17bdd23eaba 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -587,13 +587,13 @@ let isBranch = 1, isTerminator = 1 in { // Load let isSimpleLoad = 1 in -def LDR : AI2<0x0, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm, +def LDR : AI2ldw<0x0, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm, "ldr", " $dst, $addr", [(set GPR:$dst, (load addrmode2:$addr))]>; // Special LDR for loads from non-pc-relative constpools. let isSimpleLoad = 1, mayLoad = 1, isReMaterializable = 1 in -def LDRcp : AI2<0x0, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm, +def LDRcp : AI2ldw<0x0, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm, "ldr", " $dst, $addr", []>; // Loads with zero extension @@ -601,7 +601,7 @@ def LDRH : AI3<0xB, (outs GPR:$dst), (ins addrmode3:$addr), LdFrm, "ldr", "h $dst, $addr", [(set GPR:$dst, (zextloadi16 addrmode3:$addr))]>; -def LDRB : AI2<0x1, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm, +def LDRB : AI2ldb<0x1, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm, "ldr", "b $dst, $addr", [(set GPR:$dst, (zextloadi8 addrmode2:$addr))]>; |
