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-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp9
-rw-r--r--llvm/test/CodeGen/X86/bmi.ll4
2 files changed, 5 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 3f6598d5ca3..6e2a592c80b 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4945,17 +4945,14 @@ bool X86TargetLowering::hasAndNotCompare(SDValue Y) const {
if (VT != MVT::i32 && VT != MVT::i64)
return false;
- // A mask and compare against constant is ok for an 'andn' too
- // even though the BMI instruction doesn't have an immediate form.
-
- return true;
+ return !isa<ConstantSDNode>(Y);
}
bool X86TargetLowering::hasAndNot(SDValue Y) const {
EVT VT = Y.getValueType();
- if (!VT.isVector()) // x86 can't form 'andn' with an immediate.
- return !isa<ConstantSDNode>(Y) && hasAndNotCompare(Y);
+ if (!VT.isVector())
+ return hasAndNotCompare(Y);
// Vector.
diff --git a/llvm/test/CodeGen/X86/bmi.ll b/llvm/test/CodeGen/X86/bmi.ll
index 0a3acb4cfdf..8605c415837 100644
--- a/llvm/test/CodeGen/X86/bmi.ll
+++ b/llvm/test/CodeGen/X86/bmi.ll
@@ -157,15 +157,15 @@ define i1 @and_cmp_const(i32 %x) {
; X86-LABEL: and_cmp_const:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: notl %eax
; X86-NEXT: andl $43, %eax
+; X86-NEXT: cmpl $43, %eax
; X86-NEXT: sete %al
; X86-NEXT: retl
;
; X64-LABEL: and_cmp_const:
; X64: # %bb.0:
-; X64-NEXT: notl %edi
; X64-NEXT: andl $43, %edi
+; X64-NEXT: cmpl $43, %edi
; X64-NEXT: sete %al
; X64-NEXT: retq
%and = and i32 %x, 43
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