test: add more details to non-affine test case

We add CHECK lines to this test case to make it easier to see the difference
between affine and non-affine memory accesses. We also change the test case to
use a parameteric index expression as otherwise our range analysis will
understand that the non-affine memory access can only access input[1],
which makes it difficult to see that the memory access is in-fact modeled as
non-affine access.

llvm-svn: 287623

1 files changed, 35 insertions, 6 deletions

diff --git a/polly/test/ScopDetect/index_from_unpredictable_loop.ll b/polly/test/ScopDetect/index_from_unpredictable_loop.ll
index fad59398ac2..17ee7f28828 100644
--- a/polly/test/ScopDetect/index_from_unpredictable_loop.ll
+++ b/polly/test/ScopDetect/index_from_unpredictable_loop.ll
@@ -6,12 +6,12 @@
 ; %arrayidx101 that depends on that exit value cannot be affine.
 ; Derived from test-suite/MultiSource/Benchmarks/BitBench/uuencode/uuencode.c
 
-define void @encode_line(i8* nocapture readonly %input, i32 %octets) {
+define void @encode_line(i8* nocapture readonly %input, i32 %octets, i64 %p) {
 entry:
   br i1 undef, label %for.body, label %for.end
 
 for.body:
-  %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ 0, %entry ]
+  %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ %p, %entry ]
   %octets.addr.02 = phi i32 [ undef, %for.inc ], [ %octets, %entry ]
   br i1 false, label %for.inc, label %if.else
 
@@ -22,7 +22,7 @@ if.else:
 if.then84:
   %0 = add nsw i64 %indvars.iv, 1
   %arrayidx101 = getelementptr inbounds i8, i8* %input, i64 %0
-  %1 = load i8, i8* %arrayidx101, align 1
+  store i8 42, i8* %arrayidx101, align 1
   br label %for.end
 
 for.inc:
@@ -34,8 +34,37 @@ for.end:
   ret void
 }
 
+; AFFINE:       Region: %if.else---%for.end
 
-; AFFINE-NOT: Function: encode_line
+; AFFINE:       Statements {
+; AFFINE-NEXT:  	Stmt_if_then84
+; AFFINE-NEXT:          Domain :=
+; AFFINE-NEXT:              [octets, p_1, p] -> { Stmt_if_then84[] : octets = 2 };
+; AFFINE-NEXT:          Schedule :=
+; AFFINE-NEXT:              [octets, p_1, p] -> { Stmt_if_then84[] -> [] };
+; AFFINE-NEXT:          ReadAccess :=	[Reduction Type: NONE] [Scalar: 1]
+; AFFINE-NEXT:              [octets, p_1, p] -> { Stmt_if_then84[] -> MemRef_indvars_iv[] };
+; AFFINE-NEXT:          MustWriteAccess :=	[Reduction Type: NONE] [Scalar: 0]
+; AFFINE-NEXT:              [octets, p_1, p] -> { Stmt_if_then84[] -> MemRef_input[1 + p] };
+; AFFINE-NEXT:  }
 
-; NONAFFINE:      Function: encode_line
-; NONAFFINE-NEXT: Region: %for.body---%for.end
+; NONAFFINE:      Region: %for.body---%for.end
+
+; NONAFFINE:      Statements {
+; NONAFFINE-NEXT: 	Stmt_for_body
+; NONAFFINE-NEXT:         Domain :=
+; NONAFFINE-NEXT:             [octets] -> { Stmt_for_body[0] };
+; NONAFFINE-NEXT:         Schedule :=
+; NONAFFINE-NEXT:             [octets] -> { Stmt_for_body[i0] -> [0, 0] };
+; NONAFFINE-NEXT:         MustWriteAccess :=	[Reduction Type: NONE] [Scalar: 1]
+; NONAFFINE-NEXT:             [octets] -> { Stmt_for_body[i0] -> MemRef_indvars_iv[] };
+; NONAFFINE-NEXT: 	Stmt_if_then84
+; NONAFFINE-NEXT:         Domain :=
+; NONAFFINE-NEXT:             [octets] -> { Stmt_if_then84[] : octets = 2 };
+; NONAFFINE-NEXT:         Schedule :=
+; NONAFFINE-NEXT:             [octets] -> { Stmt_if_then84[] -> [1, 0] };
+; NONAFFINE-NEXT:         ReadAccess :=	[Reduction Type: NONE] [Scalar: 1]
+; NONAFFINE-NEXT:             [octets] -> { Stmt_if_then84[] -> MemRef_indvars_iv[] };
+; NONAFFINE-NEXT:         MayWriteAccess :=	[Reduction Type: NONE] [Scalar: 0]
+; NONAFFINE-NEXT:             [octets] -> { Stmt_if_then84[] -> MemRef_input[o0] };
+; NONAFFINE-NEXT: }