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authorAlex Zinenko <zinenko@google.com>2019-07-09 06:37:17 -0700
committerA. Unique TensorFlower <gardener@tensorflow.org>2019-07-09 06:37:41 -0700
commit9d03f5674f4e511d834b3de9d24eb1248a06f864 (patch)
tree7d363d8ec7512beb32da683197901958cdf24cce /mlir/test/lib/Transforms/TestVectorizationUtils.cpp
parent80e287108771685d1eb20ad3f27f4459068604f0 (diff)
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Implement parametric tiling on standard for loops
Parametric tiling can be used to extract outer loops with fixed number of iterations. This in turn enables mapping to GPU kernels on a fixed grid independently of the range of the original loops, which may be unknown statically, making the kernel adaptable to different sizes. Provide a utility function that also computes the parametric tile size given the range of the loop. Exercise the utility function through a simple pass that applies it to all top-level loop nests. Permutability or parallelism checks must be performed before calling this utility function in actual passes. Note that parametric tiling cannot be implemented in a purely affine way, although it can be encoded using semi-affine maps. The choice to implement it on standard loops is guided by them being the common representation between Affine loops, Linalg and GPU kernels. PiperOrigin-RevId: 257180251
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