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authorRiver Riddle <riverriddle@google.com>2019-12-23 14:45:01 -0800
committerA. Unique TensorFlower <gardener@tensorflow.org>2019-12-23 16:36:53 -0800
commite62a69561fb9d7b1013d2853da68d79a7907fead (patch)
tree0dd059094cbfb8d904513abcdc1fbe8cfa89bb09 /mlir/test/lib/Transforms/TestLoopMapping.cpp
parent5d5bd2e1da29d976cb125dbb3cd097a5e42b2be4 (diff)
downloadbcm5719-llvm-e62a69561fb9d7b1013d2853da68d79a7907fead.tar.gz
bcm5719-llvm-e62a69561fb9d7b1013d2853da68d79a7907fead.zip
NFC: Replace ValuePtr with Value and remove it now that Value is value-typed.
ValuePtr was a temporary typedef during the transition to a value-typed Value. PiperOrigin-RevId: 286945714
Diffstat (limited to 'mlir/test/lib/Transforms/TestLoopMapping.cpp')
-rw-r--r--mlir/test/lib/Transforms/TestLoopMapping.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/mlir/test/lib/Transforms/TestLoopMapping.cpp b/mlir/test/lib/Transforms/TestLoopMapping.cpp
index 5b1394d5996..86e5713eb03 100644
--- a/mlir/test/lib/Transforms/TestLoopMapping.cpp
+++ b/mlir/test/lib/Transforms/TestLoopMapping.cpp
@@ -32,7 +32,7 @@ public:
// SSA values for the transformation are created out of thin air by
// unregistered "new_processor_id_and_range" operations. This is enough to
// emulate mapping conditions.
- SmallVector<ValuePtr, 8> processorIds, numProcessors;
+ SmallVector<Value, 8> processorIds, numProcessors;
func.walk([&processorIds, &numProcessors](Operation *op) {
if (op->getName().getStringRef() != "new_processor_id_and_range")
return;
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