Deprecate linalg.subview in favor of std.subview

This CL uses the now standard std.subview in linalg.
Two shortcuts are currently taken to allow this port:
1. the type resulting from a view is currently degraded to fully dynamic to pass the SubViewOp verifier.
2. indexing into SubViewOp may access out of bounds since lowering to LLVM does not currently enforce it by construction.

These will be fixed in subsequent commits after discussions.

PiperOrigin-RevId: 280250129

1 files changed, 9 insertions, 17 deletions

diff --git a/mlir/test/Conversion/LoopsToGPU/imperfect_linalg.mlir b/mlir/test/Conversion/LoopsToGPU/imperfect_linalg.mlir
index cdcaf42c1d1..abf8da6b562 100644
--- a/mlir/test/Conversion/LoopsToGPU/imperfect_linalg.mlir
+++ b/mlir/test/Conversion/LoopsToGPU/imperfect_linalg.mlir
@@ -1,7 +1,5 @@
 // RUN: mlir-opt %s -convert-loop-op-to-gpu -gpu-num-workgroups=2,16 -gpu-workgroup-size=32,4 | FileCheck %s
 
-#map0 = (d0) -> (d0 + 2)
-#map1 = (d0, d1)[s0, s1] -> (d0 * s1 + s0 + d1)
 module {
   func @fmul(%arg0: memref<?x?xf32>, %arg1: memref<?x?xf32>, %arg2: memref<?x?xf32>) {
     %c1 = constant 1 : index
@@ -21,24 +19,18 @@ module {
     // CHECK:           store
     loop.for %arg3 = %c0 to %0 step %c2 {
       loop.for %arg4 = %c0 to %1 step %c2 {
-        %2 = affine.apply #map0(%arg3)
-        %3 = affine.apply #map0(%arg4)
-        %4 = linalg.subview %arg0[%arg3, %2, %c1, %arg4, %3, %c1] : memref<?x?xf32>
-        %5 = affine.apply #map0(%arg3)
-        %6 = affine.apply #map0(%arg4)
-        %7 = linalg.subview %arg1[%arg3, %5, %c1, %arg4, %6, %c1] : memref<?x?xf32>
-        %8 = affine.apply #map0(%arg3)
-        %9 = affine.apply #map0(%arg4)
-        %10 = linalg.subview %arg2[%arg3, %8, %c1, %arg4, %9, %c1] : memref<?x?xf32>
-        %11 = dim %4, 0 : memref<?x?xf32, #map1>
-        %12 = dim %4, 1 : memref<?x?xf32, #map1>
+        %4 = std.subview %arg0[%arg3, %arg4][%c2, %c2][%c1, %c1] : memref<?x?xf32> to memref<?x?xf32, offset: ?, strides: [?, ?]>
+        %7 = std.subview %arg1[%arg3, %arg4][%c2, %c2][%c1, %c1] : memref<?x?xf32> to memref<?x?xf32, offset: ?, strides: [?, ?]>
+        %10 = std.subview %arg2[%arg3, %arg4][%c2, %c2][%c1, %c1] : memref<?x?xf32> to memref<?x?xf32, offset: ?, strides: [?, ?]>
+        %11 = dim %4, 0 : memref<?x?xf32, offset: ?, strides: [?, ?]>
+        %12 = dim %4, 1 : memref<?x?xf32, offset: ?, strides: [?, ?]>
         loop.for %arg5 = %c0 to %11 step %c1 {
           loop.for %arg6 = %c0 to %12 step %c1 {
-            %13 = load %4[%arg5, %arg6] : memref<?x?xf32, #map1>
-            %14 = load %7[%arg5, %arg6] : memref<?x?xf32, #map1>
-            %15 = load %10[%arg5, %arg6] : memref<?x?xf32, #map1>
+            %13 = load %4[%arg5, %arg6] : memref<?x?xf32, offset: ?, strides: [?, ?]>
+            %14 = load %7[%arg5, %arg6] : memref<?x?xf32, offset: ?, strides: [?, ?]>
+            %15 = load %10[%arg5, %arg6] : memref<?x?xf32, offset: ?, strides: [?, ?]>
             %16 = mulf %13, %14 : f32
-            store %16, %10[%arg5, %arg6] : memref<?x?xf32, #map1>
+            store %16, %10[%arg5, %arg6] : memref<?x?xf32, offset: ?, strides: [?, ?]>
           }
         }
       }