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| author | Uday Bondhugula <uday@polymagelabs.com> | 2019-12-18 09:59:37 -0800 |
|---|---|---|
| committer | A. Unique TensorFlower <gardener@tensorflow.org> | 2019-12-18 10:00:04 -0800 |
| commit | 47034c4bc509f727051ff172c2bf3367a60e2c01 (patch) | |
| tree | 80c36f8028f7d82b5768e3c46ecc2860e22902f6 /mlir/lib/Conversion/StandardToLLVM | |
| parent | 4562e389a43caa2e30ebf277c12743edafe6a0ac (diff) | |
| download | bcm5719-llvm-47034c4bc509f727051ff172c2bf3367a60e2c01.tar.gz bcm5719-llvm-47034c4bc509f727051ff172c2bf3367a60e2c01.zip | |
Introduce prefetch op: affine -> std -> llvm intrinsic
Introduce affine.prefetch: op to prefetch using a multi-dimensional
subscript on a memref; similar to affine.load but has no effect on
semantics, but only on performance.
Provide lowering through std.prefetch, llvm.prefetch and map to llvm's
prefetch instrinsic. All attributes reflected through the lowering -
locality hint, rw, and instr/data cache.
affine.prefetch %0[%i, %j + 5], false, 3, true : memref<400x400xi32>
Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>
Closes tensorflow/mlir#225
COPYBARA_INTEGRATE_REVIEW=https://github.com/tensorflow/mlir/pull/225 from bondhugula:prefetch 4c3b4e93bc64d9a5719504e6d6e1657818a2ead0
PiperOrigin-RevId: 286212997
Diffstat (limited to 'mlir/lib/Conversion/StandardToLLVM')
| -rw-r--r-- | mlir/lib/Conversion/StandardToLLVM/ConvertStandardToLLVM.cpp | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/mlir/lib/Conversion/StandardToLLVM/ConvertStandardToLLVM.cpp b/mlir/lib/Conversion/StandardToLLVM/ConvertStandardToLLVM.cpp index 5bb18458725..897135a8bbb 100644 --- a/mlir/lib/Conversion/StandardToLLVM/ConvertStandardToLLVM.cpp +++ b/mlir/lib/Conversion/StandardToLLVM/ConvertStandardToLLVM.cpp @@ -1462,6 +1462,39 @@ struct StoreOpLowering : public LoadStoreOpLowering<StoreOp> { } }; +// The prefetch operation is lowered in a way similar to the load operation +// except that the llvm.prefetch operation is used for replacement. +struct PrefetchOpLowering : public LoadStoreOpLowering<PrefetchOp> { + using Base::Base; + + PatternMatchResult + matchAndRewrite(Operation *op, ArrayRef<Value *> operands, + ConversionPatternRewriter &rewriter) const override { + auto prefetchOp = cast<PrefetchOp>(op); + OperandAdaptor<PrefetchOp> transformed(operands); + auto type = prefetchOp.getMemRefType(); + + Value *dataPtr = getDataPtr(op->getLoc(), type, transformed.memref(), + transformed.indices(), rewriter, getModule()); + + // Replace with llvm.prefetch. + auto llvmI32Type = lowering.convertType(rewriter.getIntegerType(32)); + auto isWrite = rewriter.create<LLVM::ConstantOp>( + op->getLoc(), llvmI32Type, + rewriter.getI32IntegerAttr(prefetchOp.isWrite())); + auto localityHint = rewriter.create<LLVM::ConstantOp>( + op->getLoc(), llvmI32Type, + rewriter.getI32IntegerAttr(prefetchOp.localityHint().getZExtValue())); + auto isData = rewriter.create<LLVM::ConstantOp>( + op->getLoc(), llvmI32Type, + rewriter.getI32IntegerAttr(prefetchOp.isDataCache())); + + rewriter.replaceOpWithNewOp<LLVM::Prefetch>(op, dataPtr, isWrite, + localityHint, isData); + return matchSuccess(); + } +}; + // The lowering of index_cast becomes an integer conversion since index becomes // an integer. If the bit width of the source and target integer types is the // same, just erase the cast. If the target type is wider, sign-extend the @@ -2041,6 +2074,7 @@ void mlir::populateStdToLLVMNonMemoryConversionPatterns( MulFOpLowering, MulIOpLowering, OrOpLowering, + PrefetchOpLowering, RemFOpLowering, RemISOpLowering, RemIUOpLowering, |

