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| author | Tom Stellard <tstellar@redhat.com> | 2017-06-19 13:15:45 +0000 |
|---|---|---|
| committer | Tom Stellard <tstellar@redhat.com> | 2017-06-19 13:15:45 +0000 |
| commit | ff63ee0db5eb2b6d19d13ed1ffe5e5b57df4b618 (patch) | |
| tree | ea64089befacc46fe76f948ad24a4f83632c8a59 /llvm | |
| parent | bd2dedaa38b13325fe8b2b0e1536fcf5dbe37036 (diff) | |
| download | bcm5719-llvm-ff63ee0db5eb2b6d19d13ed1ffe5e5b57df4b618.tar.gz bcm5719-llvm-ff63ee0db5eb2b6d19d13ed1ffe5e5b57df4b618.zip | |
AMDGPU/GlobalISel: Mark G_BITCAST s32 <--> <2 x s16> legal
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D34129
llvm-svn: 305692
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 7 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir | 23 |
2 files changed, 30 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index 790a69b8439..58c025faffc 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -29,6 +29,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo() { using namespace TargetOpcode; const LLT S1= LLT::scalar(1); + const LLT V2S16 = LLT::vector(2, 16); const LLT S32 = LLT::scalar(32); const LLT S64 = LLT::scalar(64); const LLT P1 = LLT::pointer(1, 64); @@ -36,6 +37,12 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo() { setAction({G_ADD, S32}, Legal); + setAction({G_BITCAST, V2S16}, Legal); + setAction({G_BITCAST, 1, S32}, Legal); + + setAction({G_BITCAST, S32}, Legal); + setAction({G_BITCAST, 1, V2S16}, Legal); + // FIXME: i1 operands to intrinsics should always be legal, but other i1 // values may not be legal. We need to figure out how to distinguish // between these two scenarios. diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir new file mode 100644 index 00000000000..e27c313b8ec --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir @@ -0,0 +1,23 @@ +# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel %s -o - | FileCheck %s + +--- | + define void @test_bitcast() { ret void } +... + +--- +name: test_bitcast +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } +body: | + bb.0: + liveins: %vgpr0 + ; CHECK-LABEL: name: test_bitcast + ; CHECK: %1(<2 x s16>) = G_BITCAST %0 + ; CHECK: %2(s32) = G_BITCAST %1 + + %0(s32) = COPY %vgpr0 + %1(<2 x s16>) = G_BITCAST %0 + %2(s32) = G_BITCAST %1 +... |
