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authorDale Johannesen <dalej@apple.com>2010-05-16 18:22:38 +0000
committerDale Johannesen <dalej@apple.com>2010-05-16 18:22:38 +0000
commitfc1492d71b1c8b7005ef679c4092d28424c8c755 (patch)
tree9ec2ed8b217731068a9397223fcc63eaf2c67762 /llvm
parent45a999719b45e1ef00d928c54ca25ef8ef6889ff (diff)
downloadbcm5719-llvm-fc1492d71b1c8b7005ef679c4092d28424c8c755.tar.gz
bcm5719-llvm-fc1492d71b1c8b7005ef679c4092d28424c8c755.zip
Make x86-64 64-bit bitconvert work when SSE is not available.
(This worked as of about 6 months ago and I didn't track down exactly what broke it; I think this fix is appropriate.) llvm-svn: 103911
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp4
-rw-r--r--llvm/test/CodeGen/X86/2010-05-16-nosseconversion.ll11
2 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9fa7bb1d3cc..35127eb84db 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -217,6 +217,10 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
if (!X86ScalarSSEf64) {
setOperationAction(ISD::BIT_CONVERT , MVT::f32 , Expand);
setOperationAction(ISD::BIT_CONVERT , MVT::i32 , Expand);
+ if (Subtarget->is64Bit()) {
+ setOperationAction(ISD::BIT_CONVERT , MVT::f64 , Expand);
+ setOperationAction(ISD::BIT_CONVERT , MVT::i64 , Expand);
+ }
}
// Scalar integer divide and remainder are lowered to use operations that
diff --git a/llvm/test/CodeGen/X86/2010-05-16-nosseconversion.ll b/llvm/test/CodeGen/X86/2010-05-16-nosseconversion.ll
new file mode 100644
index 00000000000..266681cd169
--- /dev/null
+++ b/llvm/test/CodeGen/X86/2010-05-16-nosseconversion.ll
@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=x86_64-apple-darwin -mattr=-sse < %s
+
+@x = common global i64 0 ; <i64*> [#uses=1]
+
+define i32 @foo() nounwind readonly ssp {
+entry:
+ %0 = load i64* @x, align 8 ; <i64> [#uses=1]
+ %1 = uitofp i64 %0 to double ; <double> [#uses=1]
+ %2 = fptosi double %1 to i32 ; <i32> [#uses=1]
+ ret i32 %2
+}
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