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authorSerguei Katkov <serguei.katkov@azul.com>2017-10-31 07:01:35 +0000
committerSerguei Katkov <serguei.katkov@azul.com>2017-10-31 07:01:35 +0000
commitf66a59ee88f69b8ed76b5a31ed930a42b30c30e7 (patch)
tree4fa009c66fe4322d7a80389e25c4cf751155f3bc /llvm
parent84286ce5ddd508dde24173f3af8e1d4cb0259708 (diff)
downloadbcm5719-llvm-f66a59ee88f69b8ed76b5a31ed930a42b30c30e7.tar.gz
bcm5719-llvm-f66a59ee88f69b8ed76b5a31ed930a42b30c30e7.zip
[CGP] Fix the detection of trivial case for addressing mode
The address can be presented as a bitcast of baseReg. In this case it is still trivial but OriginalValue != baseReg. llvm-svn: 316980
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/CodeGen/CodeGenPrepare.cpp19
1 files changed, 9 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index 13bdad71252..51f2a320b29 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -2751,17 +2751,16 @@ struct ExtAddrMode : public TargetLowering::AddrMode {
return static_cast<FieldName>(Result);
}
- // AddrModes with a base reg or gv where the reg/gv is just the original
- // value are trivial.
+ // AddrModes with a baseReg or gv where the reg/gv is
+ // the only populated field are trivial.
bool isTrivial() {
- bool Trivial = (BaseGV && BaseGV == OriginalValue) ||
- (BaseReg && BaseReg == OriginalValue);
- // If the AddrMode is trivial it shouldn't have an offset or be scaled.
- if (Trivial) {
- assert(BaseOffs == 0);
- assert(Scale == 0);
- }
- return Trivial;
+ if (BaseGV && !BaseOffs && !Scale && !BaseReg)
+ return true;
+
+ if (!BaseGV && !BaseOffs && !Scale && BaseReg)
+ return true;
+
+ return false;
}
};
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