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author | Sanjay Patel <spatel@rotateright.com> | 2018-08-27 14:20:15 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2018-08-27 14:20:15 +0000 |
commit | f64592787570b6e42507b15c56c29a4b45aeb0b2 (patch) | |
tree | 22b9a8bf12e4a5cfa177379852e825c1cbbb5784 /llvm | |
parent | 5d06f17b8a4717dea5c75d36c26c4927e6633a01 (diff) | |
download | bcm5719-llvm-f64592787570b6e42507b15c56c29a4b45aeb0b2.tar.gz bcm5719-llvm-f64592787570b6e42507b15c56c29a4b45aeb0b2.zip |
[SelectionDAG] add helper query for binops; NFC
We will also use this in a planned enhancement for vector insertelement.
llvm-svn: 340741
Diffstat (limited to 'llvm')
-rw-r--r-- | llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 12 | ||||
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 13 |
2 files changed, 14 insertions, 11 deletions
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h index ce8e117d6d0..5ad24598035 100644 --- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h @@ -2444,6 +2444,18 @@ namespace ISD { cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED; } + /// Return true if the node is a math/logic binary operator. This corresponds + /// to the IR function of the same name. + inline bool isBinaryOp(const SDNode *N) { + auto Op = N->getOpcode(); + return (Op == ISD::ADD || Op == ISD::SUB || Op == ISD::MUL || + Op == ISD::AND || Op == ISD::OR || Op == ISD::XOR || + Op == ISD::SHL || Op == ISD::SRL || Op == ISD::SRA || + Op == ISD::SDIV || Op == ISD::UDIV || Op == ISD::SREM || + Op == ISD::UREM || Op == ISD::FADD || Op == ISD::FSUB || + Op == ISD::FMUL || Op == ISD::FDIV || Op == ISD::FREM); + } + /// Attempt to match a unary predicate against a scalar/splat constant or /// every element of a constant BUILD_VECTOR. bool matchUnaryPredicate(SDValue Op, diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index d894d8d5530..44fdbc1b3d0 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1874,17 +1874,7 @@ static ConstantSDNode *getAsNonOpaqueConstant(SDValue N) { } SDValue DAGCombiner::foldBinOpIntoSelect(SDNode *BO) { - auto BinOpcode = BO->getOpcode(); - assert((BinOpcode == ISD::ADD || BinOpcode == ISD::SUB || - BinOpcode == ISD::MUL || BinOpcode == ISD::SDIV || - BinOpcode == ISD::UDIV || BinOpcode == ISD::SREM || - BinOpcode == ISD::UREM || BinOpcode == ISD::AND || - BinOpcode == ISD::OR || BinOpcode == ISD::XOR || - BinOpcode == ISD::SHL || BinOpcode == ISD::SRL || - BinOpcode == ISD::SRA || BinOpcode == ISD::FADD || - BinOpcode == ISD::FSUB || BinOpcode == ISD::FMUL || - BinOpcode == ISD::FDIV || BinOpcode == ISD::FREM) && - "Unexpected binary operator"); + assert(ISD::isBinaryOp(BO) && "Unexpected binary operator"); // Don't do this unless the old select is going away. We want to eliminate the // binary operator, not replace a binop with a select. @@ -1914,6 +1904,7 @@ SDValue DAGCombiner::foldBinOpIntoSelect(SDNode *BO) { // propagate non constant operands into select. I.e.: // and (select Cond, 0, -1), X --> select Cond, 0, X // or X, (select Cond, -1, 0) --> select Cond, -1, X + auto BinOpcode = BO->getOpcode(); bool CanFoldNonConst = (BinOpcode == ISD::AND || BinOpcode == ISD::OR) && (isNullConstantOrNullSplatConstant(CT) || isAllOnesConstantOrAllOnesSplatConstant(CT)) && |