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| author | Ivan A. Kosarev <ikosarev@accesssoftek.com> | 2018-04-13 12:45:12 +0000 |
|---|---|---|
| committer | Ivan A. Kosarev <ikosarev@accesssoftek.com> | 2018-04-13 12:45:12 +0000 |
| commit | f533a6e5aa8f6c178cea66e6a04b9c02972add0b (patch) | |
| tree | 8a0b99759bfc582754b83d8a539ad414cb1bec3f /llvm | |
| parent | c7211fb1b69ce862fdce17327ad2aba22b891ded (diff) | |
| download | bcm5719-llvm-f533a6e5aa8f6c178cea66e6a04b9c02972add0b.tar.gz bcm5719-llvm-f533a6e5aa8f6c178cea66e6a04b9c02972add0b.zip | |
[NEON] Support intrinsic for scalar and vector versions of the VRINTN instruction
Differential Revision: https://reviews.llvm.org/D45514
llvm-svn: 330011
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/include/llvm/IR/IntrinsicsARM.td | 8 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrVFP.td | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/vrint.ll | 11 |
3 files changed, 18 insertions, 3 deletions
diff --git a/llvm/include/llvm/IR/IntrinsicsARM.td b/llvm/include/llvm/IR/IntrinsicsARM.td index fe386130168..630c61e4167 100644 --- a/llvm/include/llvm/IR/IntrinsicsARM.td +++ b/llvm/include/llvm/IR/IntrinsicsARM.td @@ -369,6 +369,10 @@ class Neon_3Arg_Long_Intrinsic : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, LLVMTruncatedType<0>, LLVMTruncatedType<0>], [IntrNoMem]>; + +class Neon_1FloatArg_Intrinsic + : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>; + class Neon_CvtFxToFP_Intrinsic : Intrinsic<[llvm_anyfloat_ty], [llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>; class Neon_CvtFPToFx_Intrinsic @@ -591,8 +595,8 @@ def int_arm_neon_vtbx2 : Neon_Tbl4Arg_Intrinsic; def int_arm_neon_vtbx3 : Neon_Tbl5Arg_Intrinsic; def int_arm_neon_vtbx4 : Neon_Tbl6Arg_Intrinsic; -// Vector Rounding -def int_arm_neon_vrintn : Neon_1Arg_Intrinsic; +// Vector and Scalar Rounding. +def int_arm_neon_vrintn : Neon_1FloatArg_Intrinsic; def int_arm_neon_vrintx : Neon_1Arg_Intrinsic; def int_arm_neon_vrinta : Neon_1Arg_Intrinsic; def int_arm_neon_vrintz : Neon_1Arg_Intrinsic; diff --git a/llvm/lib/Target/ARM/ARMInstrVFP.td b/llvm/lib/Target/ARM/ARMInstrVFP.td index 447f9a402d2..34945a23c03 100644 --- a/llvm/lib/Target/ARM/ARMInstrVFP.td +++ b/llvm/lib/Target/ARM/ARMInstrVFP.td @@ -977,7 +977,7 @@ multiclass vrint_inst_anpm<string opc, bits<2> rm, } defm VRINTA : vrint_inst_anpm<"a", 0b00, fround>; -defm VRINTN : vrint_inst_anpm<"n", 0b01>; +defm VRINTN : vrint_inst_anpm<"n", 0b01, int_arm_neon_vrintn>; defm VRINTP : vrint_inst_anpm<"p", 0b10, fceil>; defm VRINTM : vrint_inst_anpm<"m", 0b11, ffloor>; diff --git a/llvm/test/CodeGen/ARM/vrint.ll b/llvm/test/CodeGen/ARM/vrint.ll new file mode 100644 index 00000000000..55a6253735f --- /dev/null +++ b/llvm/test/CodeGen/ARM/vrint.ll @@ -0,0 +1,11 @@ +; RUN: llc -mtriple=armv8 -mattr=+neon %s -o - | FileCheck %s + +declare float @llvm.arm.neon.vrintn.f32(float) nounwind readnone + +; CHECK-LABEL: vrintn_f32: +; CHECK: vrintn.f32 +define float @vrintn_f32(float* %A) nounwind { + %tmp1 = load float, float* %A + %tmp2 = call float @llvm.arm.neon.vrintn.f32(float %tmp1) + ret float %tmp2 +} |
