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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2018-09-04 21:07:27 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2018-09-04 21:07:27 +0000
commitf4ad2cb24f87ab4774d0df86d446a1735304f08e (patch)
treec03118a5212d5a823722543d29f0afcc52f76c40 /llvm
parentb55236f522713916252f3425b388a0dacd20c355 (diff)
downloadbcm5719-llvm-f4ad2cb24f87ab4774d0df86d446a1735304f08e.tar.gz
bcm5719-llvm-f4ad2cb24f87ab4774d0df86d446a1735304f08e.zip
[Hexagon] Don't packetize new-value stores with any other stores
llvm-svn: 341409
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp7
-rw-r--r--llvm/test/CodeGen/Hexagon/packetize-nvstore.mir25
2 files changed, 32 insertions, 0 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
index ce271141bbf..a896700df1b 100644
--- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
@@ -1112,6 +1112,10 @@ static bool cannotCoexistAsymm(const MachineInstr &MI, const MachineInstr &MJ,
return MJ.isInlineAsm() || MJ.isBranch() || MJ.isBarrier() ||
MJ.isCall() || MJ.isTerminator();
+ // New-value stores cannot coexist with any other stores.
+ if (HII.isNewValueStore(MI) && MJ.mayStore())
+ return true;
+
switch (MI.getOpcode()) {
case Hexagon::S2_storew_locked:
case Hexagon::S4_stored_locked:
@@ -1654,6 +1658,9 @@ bool HexagonPacketizerList::isLegalToPruneDependencies(SUnit *SUI, SUnit *SUJ) {
return false;
}
+ if (!Coexist)
+ return false;
+
if (ChangedOffset == INT64_MAX && updateOffset(SUI, SUJ)) {
FoundSequentialDependence = false;
Dependence = false;
diff --git a/llvm/test/CodeGen/Hexagon/packetize-nvstore.mir b/llvm/test/CodeGen/Hexagon/packetize-nvstore.mir
new file mode 100644
index 00000000000..a93efa3a876
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/packetize-nvstore.mir
@@ -0,0 +1,25 @@
+# RUN: llc -march=hexagon -start-before=hexagon-packetizer -o - %s | FileCheck %s
+# This used to generate an invalid packet:
+# {
+# r1 = #0
+# memw(r0++#4) = r1.new // new-value store must be the only store
+# memw(r0+#0) = #0
+# }
+#
+# CHECK: memw
+# CHECK: }
+# CHECK: memw
+
+---
+name: f0
+tracksRegLiveness: true
+stack:
+ - { id: 0, size: 8, alignment: 8 }
+body: |
+ bb.0:
+ liveins: $r0
+ renamable $r1 = A2_tfrsi 0
+ renamable $r0 = S2_storeri_pi renamable $r0, 4, killed renamable $r1 :: (store 4 into %stack.0)
+ S4_storeiri_io renamable $r0, 0, 0 :: (store 4 into %stack.0 + 4)
+ J2_jumpr $r31, implicit-def $pc
+...
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