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authorChris Lattner <sabre@nondot.org>2004-08-15 22:19:38 +0000
committerChris Lattner <sabre@nondot.org>2004-08-15 22:19:38 +0000
commitf26b1fd35df5623e1e9e14103ed5dbc890c7b588 (patch)
tree787e1acc75023738af0925db61dc29559a104926 /llvm
parent48a3b942ae919be21890d682d3e4cba4ae95d21d (diff)
downloadbcm5719-llvm-f26b1fd35df5623e1e9e14103ed5dbc890c7b588.tar.gz
bcm5719-llvm-f26b1fd35df5623e1e9e14103ed5dbc890c7b588.zip
Add new TargetRegisterClass::contains method
llvm-svn: 15783
Diffstat (limited to 'llvm')
-rw-r--r--llvm/include/llvm/Target/MRegisterInfo.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/include/llvm/Target/MRegisterInfo.h b/llvm/include/llvm/Target/MRegisterInfo.h
index 47b55566cfb..a28f2c31890 100644
--- a/llvm/include/llvm/Target/MRegisterInfo.h
+++ b/llvm/include/llvm/Target/MRegisterInfo.h
@@ -65,6 +65,14 @@ public:
return RegsBegin[i];
}
+ /// contains - Return true if the specified register is included in this
+ /// register class.
+ bool contains(unsigned Reg) const {
+ for (iterator I = begin(), E = end(); I != E; ++I)
+ if (*I == Reg) return true;
+ return false;
+ }
+
/// allocation_order_begin/end - These methods define a range of registers
/// which specify the registers in this class that are valid to register
/// allocate, and the preferred order to allocate them in. For example,
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